Index: include/asm-arm/arch-at91/at91sam9260_matrix.h =================================================================== --- a/include/asm-arm/arch-at91/at91sam9260_matrix.h (revision 2376) +++ b/include/asm-arm/arch-at91/at91sam9260_matrix.h (revision 2386) @@ -67,7 +67,7 @@ #define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ #define AT91_MATRIX_CS4A_SMC (0 << 4) #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5 ) /* Chip Select 5 Assignment */ +#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ #define AT91_MATRIX_CS5A_SMC (0 << 5) #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) #define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ Index: include/asm-arm/arch-at91/ics1523.h =================================================================== --- a/include/asm-arm/arch-at91/ics1523.h (revision 0) +++ b/include/asm-arm/arch-at91/ics1523.h (revision 2386) @@ -0,0 +1,154 @@ +//*---------------------------------------------------------------------------- +//* ATMEL Microcontroller Software Support - ROUSSET - +//*---------------------------------------------------------------------------- +//* The software is delivered "AS IS" without warranty or condition of any +//* kind, either express, implied or statutory. This includes without +//* limitation any warranty or condition with respect to merchantability or +//* fitness for any particular purpose, or against the infringements of +//* intellectual property rights of others. +//*---------------------------------------------------------------------------- +//* File Name : ics1523.h +//* Object : Clock Generator Prototyping File. +//* +//* 1.0 08/28/02 ED : Creation +//* 1.2 13/01/03 FB : Update on lib V3 +//*---------------------------------------------------------------------------- + +#ifndef ics1523_h +#define ics1523_h + +/*-------------------------------------------*/ +/* ICS1523 TWI Serial Clock Definition */ +/*-------------------------------------------*/ + +#define ICS_MIN_CLOCK 100 /* Min Frequency Access Clock KHz */ +#define ICS_MAX_CLOCK 400 /* Max Frequency Access Clock KHz */ +#define ICS_TRANSFER_RATE ICS_MAX_CLOCK /* Transfer speed to apply */ + +#define ICS_WRITE_CLK_PNB 30 /* TWCK Clock Periods required to write */ +#define ICS_READ_CLK_PNB 40 /* TWCK Clock Periods required to read */ + +/*-------------------------------------------*/ +/* ICS1523 Write Operation Definition */ +/*-------------------------------------------*/ + +#define ICS1523_ACCESS_OK 0 /* OK */ +#define ICS1523_ACCESS_ERROR -1 /* NOK */ + +/*-------------------------------------------*/ +/* ICS1523 Device Addresses Definition */ +/*-------------------------------------------*/ + +#define ICS_ADDR 0x26 /* Device Address */ + +/*--------------------------------------------------*/ +/* ICS1523 Registers Internal Addresses Definition */ +/*--------------------------------------------------*/ + +#define ICS_ICR 0x0 /* Input Control Register */ +#define ICS_LCR 0x1 /* Loop Control Register */ +#define ICS_FD0 0x2 /* PLL FeedBack Divider LSBs */ +#define ICS_FD1 0x3 /* PLL FeedBack Divider MSBs */ +#define ICS_DPAO 0x4 /* Dynamic Phase Aligner Offset */ +#define ICS_DPAC 0x5 /* Dynamic Phase Aligner Resolution */ +#define ICS_OE 0x6 /* Output Enables Register */ +#define ICS_OD 0x7 /* Osc Divider Register */ +#define ICS_SWRST 0x8 /* DPA & PLL Reset Register */ +#define ICS_VID 0x10 /* Chip Version Register */ +#define ICS_RID 0x11 /* Chip Revision Register */ +#define ICS_SR 0x12 /* Status Register */ + +/*------------------------------------------------------*/ +/* ICS1523 Input Control Register Bits Definition */ +/*------------------------------------------------------*/ + +#define ICS_PDEN 0x1 /* Phase Detector Enable */ +#define ICS_PDPOL 0x2 /* Phase Detector Enable Polarity */ +#define ICS_REFPOL 0x4 /* External Reference Polarity */ +#define ICS_FBKPOL 0x8 /* External Feedback Polarity */ +#define ICS_FBKSEL 0x10 /* External Feedback Select */ +#define ICS_FUNCSEL 0x20 /* Function Out Select */ +#define ICS_ENPLS 0x40 /* Enable PLL Lock/Ref Status Output */ +#define ICS_ENDLS 0x80 /* Enable DPA Lock/Ref Status Output */ + +/*-----------------------------------------------------*/ +/* ICS1523 Loop Control Register Bits Definition */ +/*-----------------------------------------------------*/ + +#define ICS_PFD 0x7 /* Phase Detector Gain */ +#define ICS_PSD 0x30 /* Post-Scaler Divider */ + +/*----------------------------------------------------*/ +/* ICS1523 PLL FeedBack Divider LSBs Definition */ +/*----------------------------------------------------*/ + +#define ICS_FBDL 0xFF /* PLL FeedBack Divider LSBs */ + +/*----------------------------------------------------*/ +/* ICS1523 PLL FeedBack Divider MSBs Definition */ +/*----------------------------------------------------*/ + +#define ICS_FBDM 0xF /* PLL FeedBack Divider MSBs */ + +/*------------------------------------------------------------*/ +/* ICS1523 Dynamic Phase Aligner Offset Bits Definition */ +/*------------------------------------------------------------*/ + +#define ICS_DPAOS 0x2F /* Dynamic Phase Aligner Offset */ +#define ICS_FILSEL 0x80 /* Loop Filter Select */ + +/*----------------------------------------------------------------*/ +/* ICS1523 Dynamic Phase Aligner Resolution Bits Definition */ +/*----------------------------------------------------------------*/ + +#define ICS_DPARES 0x3 /* Dynamic Phase Aligner Resolution */ +#define ICS_MMREV 0xFC /* Metal Mask Revision Number */ + +/*-------------------------------------------------------*/ +/* ICS1523 Output Enables Register Bits Definition */ +/*-------------------------------------------------------*/ + +#define ICS_OEPCK 0x1 /* Output Enable for PECL PCLK Outputs */ +#define ICS_OETCK 0x2 /* Output Enable for STTL CLK Output */ +#define ICS_OEP2 0x4 /* Output Enable for PECL CLK/2 Outputs */ +#define ICS_OET2 0x8 /* Output Enable for STTL CLK/2 Output */ +#define ICS_OEF 0x10 /* Output Enable for STTL FUNC Output */ +#define ICS_CLK2INV 0x20 /* CLK/2 Invert */ +#define ICS_OSCL 0xC0 /* SSTL Clock Scaler */ + +/*----------------------------------------------------*/ +/* ICS1523 Osc Divider Register Bits Definition */ +/*----------------------------------------------------*/ + +#define ICS_OSCDIV 0x7F /* Oscillator Divider Modulus */ +#define ICS_INSEL 0x80 /* Input Select */ + +/*---------------------------------------------------*/ +/* ICS1523 DPA & PLL Reset Register Definition */ +/*---------------------------------------------------*/ + +#define ICS_DPAR 0x0A /* DPA Reset Command */ +#define ICS_PLLR 0x50 /* PLL Reset Command */ + +/*------------------------------------------------*/ +/* ICS1523 Chip Version Register Definition */ +/*------------------------------------------------*/ + +#define ICS_CHIPV 0xFF /* Chip Version */ + +/*-------------------------------------------------*/ +/* ICS1523 Chip Revision Register Definition */ +/*-------------------------------------------------*/ + +#define ICS_CHIPR 0xFF /* Chip Revision */ + +/*------------------------------------------*/ +/* ICS1523 Status Register Definition */ +/*------------------------------------------*/ + +#define ICS_DPALOCK 0x1 /* DPA Lock Status */ +#define ICS_PLLLOCK 0x2 /* PLL Lock Status */ + +int at91_ics1523_init(void); + +#endif /* ics1523_h */ Index: include/asm-arm/arch-at91/spi.h =================================================================== --- a/include/asm-arm/arch-at91/spi.h (revision 0) +++ b/include/asm-arm/arch-at91/spi.h (revision 2386) @@ -0,0 +1,54 @@ +/* + * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 + * + * (c) SAN People (Pty) Ltd + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef AT91_LEGACY_SPI_H +#define AT91_LEGACY_SPI_H + +#define SPI_MAJOR 153 /* registered device number */ + +#define DEFAULT_SPI_CLK 6000000 + + +/* Maximum number of buffers in a single SPI transfer. + * DataFlash uses maximum of 2 + * spidev interface supports up to 8. + */ +#define MAX_SPI_TRANSFERS 8 +#define NR_SPI_DEVICES 4 /* number of devices on SPI bus */ + +/* + * Describes the buffers for a SPI transfer. + * A transmit & receive buffer must be specified for each transfer + */ +struct spi_transfer_list { + void* tx[MAX_SPI_TRANSFERS]; /* transmit */ + int txlen[MAX_SPI_TRANSFERS]; + void* rx[MAX_SPI_TRANSFERS]; /* receive */ + int rxlen[MAX_SPI_TRANSFERS]; + int nr_transfers; /* number of transfers */ + int curr; /* current transfer */ +}; + +struct spi_local { + unsigned int pcs; /* Peripheral Chip Select value */ + + struct spi_transfer_list *xfers; /* current transfer list */ + dma_addr_t tx, rx; /* DMA address for current transfer */ + dma_addr_t txnext, rxnext; /* DMA address for next transfer */ +}; + + +/* Exported functions */ +extern void spi_access_bus(short device); +extern void spi_release_bus(short device); +extern int spi_transfer(struct spi_transfer_list* list); + +#endif Index: include/asm-arm/arch-at91/at91_mci.h =================================================================== --- a/include/asm-arm/arch-at91/at91_mci.h (revision 2376) +++ b/include/asm-arm/arch-at91/at91_mci.h (revision 2386) @@ -26,6 +26,9 @@ #define AT91_MCI_MR 0x04 /* Mode Register */ #define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */ #define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */ +#define AT91_MCI_RDPROOF (1 << 11) /* Read Proof Enable [SAM926[03] only] */ +#define AT91_MCI_WRPROOF (1 << 12) /* Write Proof Enable [SAM926[03] only] */ +#define AT91_MCI_PDCFBYTE (1 << 13) /* PDC Force Byte Transfer [SAM926[03] only] */ #define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */ #define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */ #define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */ Index: include/asm-arm/arch-at91/at91_pmc.h =================================================================== --- a/include/asm-arm/arch-at91/at91_pmc.h (revision 2376) +++ b/include/asm-arm/arch-at91/at91_pmc.h (revision 2386) @@ -37,7 +37,9 @@ #define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ -#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register */ +#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL only] */ + +#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */ #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ Index: include/asm-arm/arch-at91/board.h =================================================================== --- a/include/asm-arm/arch-at91/board.h (revision 2376) +++ b/include/asm-arm/arch-at91/board.h (revision 2386) @@ -124,9 +124,21 @@ struct atmel_ac97_data { }; extern void __init at91_add_device_ac97(struct atmel_ac97_data *data); + /* ISI */ +extern void __init at91_add_device_isi(void); + /* LEDs */ extern u8 at91_leds_cpu; extern u8 at91_leds_timer; extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); +struct at91_gpio_led { + u8 index; /* index of LED */ + char* name; /* name of LED */ + u8 gpio; /* AT91_PIN_xx */ + u8 flags; /* 1=active-high */ + char* trigger; /* default trigger */ +}; +extern void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr); + #endif Index: include/linux/clk.h =================================================================== --- a/include/linux/clk.h (revision 2376) +++ b/include/linux/clk.h (revision 2386) @@ -121,4 +121,24 @@ int clk_set_parent(struct clk *clk, stru */ struct clk *clk_get_parent(struct clk *clk); +/** + * clk_must_disable - report whether a clock's users must disable it + * @clk: one node in the clock tree + * + * This routine returns true only if the upcoming system state requires + * disabling the specified clock. + * + * It's common for platform power states to constrain certain clocks (and + * their descendants) to be unavailable, while other states allow that + * clock to be active. A platform's power states often include an "all on" + * mode; system wide sleep states like "standby" or "suspend-to-RAM"; and + * operating states which sacrifice functionality for lower power usage. + * + * The constraint value is commonly tested in device driver suspend(), to + * leave clocks active if they are needed for features like wakeup events. + * On platforms that support reduced functionality operating states, the + * constraint may also need to be tested during resume() and probe() calls. + */ +int clk_must_disable(struct clk *clk); + #endif Index: include/linux/i2c-id.h =================================================================== --- a/include/linux/i2c-id.h (revision 2376) +++ b/include/linux/i2c-id.h (revision 2386) @@ -203,6 +203,7 @@ /* --- PCA 9564 based algorithms */ #define I2C_HW_A_ISA 0x1a0000 /* generic ISA Bus interface card */ +#define I2C_HW_A_PLAT 0x1a0001 /* generic platform_bus interface */ /* --- ACPI Embedded controller algorithms */ #define I2C_HW_ACPI_EC 0x1f0000 Index: sound/soc/at91/eti_b1_wm8731.c =================================================================== --- a/sound/soc/at91/eti_b1_wm8731.c (revision 2376) +++ b/sound/soc/at91/eti_b1_wm8731.c (revision 2386) @@ -34,8 +34,7 @@ #include #include -#include -#include +#include #include #include "../codecs/wm8731.h" @@ -48,13 +47,6 @@ #define DBG(x...) #endif -#define AT91_PIO_TF1 (1 << (AT91_PIN_PB6 - PIN_BASE) % 32) -#define AT91_PIO_TK1 (1 << (AT91_PIN_PB7 - PIN_BASE) % 32) -#define AT91_PIO_TD1 (1 << (AT91_PIN_PB8 - PIN_BASE) % 32) -#define AT91_PIO_RD1 (1 << (AT91_PIN_PB9 - PIN_BASE) % 32) -#define AT91_PIO_RK1 (1 << (AT91_PIN_PB10 - PIN_BASE) % 32) -#define AT91_PIO_RF1 (1 << (AT91_PIN_PB11 - PIN_BASE) % 32) - static struct clk *pck1_clk; static struct clk *pllb_clk; @@ -277,7 +269,6 @@ static struct platform_device *eti_b1_sn static int __init eti_b1_init(void) { int ret; - u32 ssc_pio_lines; struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data; if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) { @@ -311,19 +302,12 @@ static int __init eti_b1_init(void) goto fail_io_unmap; } - ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1 - | AT91_PIO_RD1 /* | AT91_PIO_RK1 */ | AT91_PIO_RF1; - - /* Reset all PIO registers and assign lines to peripheral A */ - at91_sys_write(AT91_PIOB + PIO_PDR, ssc_pio_lines); - at91_sys_write(AT91_PIOB + PIO_ODR, ssc_pio_lines); - at91_sys_write(AT91_PIOB + PIO_IFDR, ssc_pio_lines); - at91_sys_write(AT91_PIOB + PIO_CODR, ssc_pio_lines); - at91_sys_write(AT91_PIOB + PIO_IDR, ssc_pio_lines); - at91_sys_write(AT91_PIOB + PIO_MDDR, ssc_pio_lines); - at91_sys_write(AT91_PIOB + PIO_PUDR, ssc_pio_lines); - at91_sys_write(AT91_PIOB + PIO_ASR, ssc_pio_lines); - at91_sys_write(AT91_PIOB + PIO_OWDR, ssc_pio_lines); + at91_set_A_periph(AT91_PIN_PB6, 0); /* TF1 */ + at91_set_A_periph(AT91_PIN_PB7, 0); /* TK1 */ + at91_set_A_periph(AT91_PIN_PB8, 0); /* TD1 */ + at91_set_A_periph(AT91_PIN_PB9, 0); /* RD1 */ +/* at91_set_A_periph(AT91_PIN_PB10, 0);*/ /* RK1 */ + at91_set_A_periph(AT91_PIN_PB11, 0); /* RF1 */ /* * Set PCK1 parent to PLLB and its rate to 12 Mhz. Index: arch/arm/boot/compressed/head-at91rm9200.S =================================================================== --- a/arch/arm/boot/compressed/head-at91rm9200.S (revision 2376) +++ b/arch/arm/boot/compressed/head-at91rm9200.S (revision 2386) @@ -73,6 +73,12 @@ cmp r7, r3 beq 99f + @ Promwad Chub : 1181 + mov r3, #(MACH_TYPE_CHUB & 0xff) + orr r3, r3, #(MACH_TYPE_CHUB & 0xff00) + cmp r7, r3 + beq 99f + @ Unknown board, use the AT91RM9200DK board @ mov r7, #MACH_TYPE_AT91RM9200 mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff) Index: arch/arm/mach-at91/board-kb9202.c =================================================================== --- a/arch/arm/mach-at91/board-kb9202.c (revision 2376) +++ b/arch/arm/mach-at91/board-kb9202.c (revision 2386) @@ -37,6 +37,8 @@ #include #include +#include + #include "generic.h" @@ -111,6 +113,48 @@ static struct at91_nand_data __initdata .partition_info = nand_partitions, }; + +#if defined(CONFIG_FB_S1D15605) +#warning "Rather pass reset pin via platform_data" +static struct resource kb9202_lcd_resources[] = { + [0] = { + .start = AT91_CHIPSELECT_2, + .end = AT91_CHIPSELECT_2 + 0x200FF, + .flags = IORESOURCE_MEM + }, + [1] = { /* reset pin */ + .start = AT91_PIN_PC22, + .end = AT91_PIN_PC22, + .flags = IORESOURCE_MEM + }, +}; + +static struct platform_device kb9202_lcd_device = { + .name = "s1d15605fb", + .id = 0, + .num_resources = ARRAY_SIZE(kb9202_lcd_resources), + .resource = kb9202_lcd_resources, +}; + +static void __init kb9202_add_device_lcd(void) +{ + /* In case the boot loader did not set the chip select mode and timing */ + at91_sys_write(AT91_SMC_CSR(2), + AT91_SMC_WSEN | AT91_SMC_NWS_(18) | AT91_SMC_TDF_(1) | AT91_SMC_DBW_8 | + AT91_SMC_RWSETUP_(1) | AT91_SMC_RWHOLD_(1)); + + /* Backlight pin = output, off */ + at91_set_gpio_output(AT91_PIN_PC23, 0); + + /* Reset pin = output, in reset */ + at91_set_gpio_output(AT91_PIN_PC22, 0); + + platform_device_register(&kb9202_lcd_device); +} +#else +static void __init kb9202_add_device_lcd(void) {} +#endif + static void __init kb9202_board_init(void) { /* Serial */ @@ -129,6 +173,8 @@ static void __init kb9202_board_init(voi at91_add_device_spi(NULL, 0); /* NAND */ at91_add_device_nand(&kb9202_nand_data); + /* LCD */ + kb9202_add_device_lcd(); } MACHINE_START(KB9200, "KB920x") Index: arch/arm/mach-at91/Kconfig =================================================================== --- a/arch/arm/mach-at91/Kconfig (revision 2376) +++ b/arch/arm/mach-at91/Kconfig (revision 2386) @@ -97,6 +97,12 @@ config MACH_KAFA help Select this if you are using Sperry-Sun's KAFA board. +config MACH_CHUB + bool "Promwad Chub board" + depends on ARCH_AT91RM9200 + help + Select this if you are using Promwad's Chub board. + endif # ---------------------------------------------------------- @@ -121,6 +127,13 @@ config MACH_AT91SAM9260EK Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit +config MACH_CAM60 + bool "KwikByte CAM60 board" + depends on ARCH_AT91SAM9260 + help + Select this if you are using KwikByte's CAM60 board based on the Atmel AT91SAM9260. + + endif # ---------------------------------------------------------- @@ -184,6 +197,20 @@ config MTD_NAND_AT91_BUSWIDTH_16 On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). +config CSB300_WAKE_SW0 + bool "CSB300 SW0 irq0 wakeup" + depends on MACH_CSB337 && PM + help + If you have a CSB300 connected to your CSB337, this lets + SW0 serve as a wakeup button. It uses IRQ0. + +config CSB300_WAKE_SW1 + bool "CSB300 SW1 gpio wakeup" + depends on MACH_CSB337 && PM + help + If you have a CSB300 connected to your CSB337, this lets + SW1 serve as a wakeup button. It uses GPIO. + # ---------------------------------------------------------- comment "AT91 Feature Selections" @@ -194,6 +221,20 @@ config AT91_PROGRAMMABLE_CLOCKS Select this if you need to program one or more of the PCK0..PCK3 programmable clock outputs. +config ATMEL_TCLIB + bool "Timer/Counter Library" + help + Select this if you want a library to allocate the Timer/Counter + blocks found on many Atmel processors. This facilitates using + these modules despite processor differences. + +config AT91_SLOW_CLOCK + bool "Suspend-to-RAM uses slow clock mode (EXPERIMENTAL)" + depends on PM && EXPERIMENTAL + help + Select this if you wish to put the CPU into slow clock mode + while in the "Suspend to RAM" state, to save more power. + endmenu endif Index: arch/arm/mach-at91/at91sam9260.c =================================================================== --- a/arch/arm/mach-at91/at91sam9260.c (revision 2376) +++ b/arch/arm/mach-at91/at91sam9260.c (revision 2386) @@ -269,6 +269,33 @@ static void at91sam9260_reset(void) /* -------------------------------------------------------------------- + * Timer/Counter library initialization + * -------------------------------------------------------------------- */ +#ifdef CONFIG_ATMEL_TCLIB + +#include "tclib.h" + +static struct atmel_tcblock at91sam9260_tcblocks[] = { + [0] = { + .physaddr = AT91SAM9260_BASE_TCB0, + .irq = { AT91SAM9260_ID_TC0, AT91SAM9260_ID_TC1, AT91SAM9260_ID_TC2 }, + .clk = { &tc0_clk, &tc1_clk, &tc2_clk }, + }, + [1] = { + .physaddr = AT91SAM9260_BASE_TCB1, + .irq = { AT91SAM9260_ID_TC3, AT91SAM9260_ID_TC4, AT91SAM9260_ID_TC5 }, + .clk = { &tc3_clk, &tc4_clk, &tc5_clk }, + }, +}; + +#define at91sam9260_tc_init() atmel_tc_init(at91sam9260_tcblocks, ARRAY_SIZE(at91sam9260_tcblocks)) + +#else +#define at91sam9260_tc_init() do {} while(0) +#endif + + +/* -------------------------------------------------------------------- * AT91SAM9260 processor initialization * -------------------------------------------------------------------- */ @@ -315,6 +342,9 @@ void __init at91sam9260_initialize(unsig /* Register GPIO subsystem */ at91_gpio_init(at91sam9260_gpio, 3); + + /* Initialize the Timer/Counter blocks */ + at91sam9260_tc_init(); } /* -------------------------------------------------------------------- @@ -327,30 +357,30 @@ void __init at91sam9260_initialize(unsig static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { 7, /* Advanced Interrupt Controller */ 7, /* System Peripherals */ - 0, /* Parallel IO Controller A */ - 0, /* Parallel IO Controller B */ - 0, /* Parallel IO Controller C */ + 1, /* Parallel IO Controller A */ + 1, /* Parallel IO Controller B */ + 1, /* Parallel IO Controller C */ 0, /* Analog-to-Digital Converter */ - 6, /* USART 0 */ - 6, /* USART 1 */ - 6, /* USART 2 */ + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ 0, /* Multimedia Card Interface */ - 4, /* USB Device Port */ - 0, /* Two-Wire Interface */ - 6, /* Serial Peripheral Interface 0 */ - 6, /* Serial Peripheral Interface 1 */ + 2, /* USB Device Port */ + 6, /* Two-Wire Interface */ + 5, /* Serial Peripheral Interface 0 */ + 5, /* Serial Peripheral Interface 1 */ 5, /* Serial Synchronous Controller */ 0, 0, 0, /* Timer Counter 0 */ 0, /* Timer Counter 1 */ 0, /* Timer Counter 2 */ - 3, /* USB Host port */ + 2, /* USB Host port */ 3, /* Ethernet */ 0, /* Image Sensor Interface */ - 6, /* USART 3 */ - 6, /* USART 4 */ - 6, /* USART 5 */ + 5, /* USART 3 */ + 5, /* USART 4 */ + 5, /* USART 5 */ 0, /* Timer Counter 3 */ 0, /* Timer Counter 4 */ 0, /* Timer Counter 5 */ Index: arch/arm/mach-at91/at91sam9261.c =================================================================== --- a/arch/arm/mach-at91/at91sam9261.c (revision 2376) +++ b/arch/arm/mach-at91/at91sam9261.c (revision 2386) @@ -247,6 +247,28 @@ static void at91sam9261_reset(void) /* -------------------------------------------------------------------- + * Timer/Counter library initialization + * -------------------------------------------------------------------- */ +#ifdef CONFIG_ATMEL_TCLIB + +#include "tclib.h" + +static struct atmel_tcblock at91sam9261_tcblocks[] = { + [0] = { + .physaddr = AT91SAM9261_BASE_TCB0, + .irq = { AT91SAM9261_ID_TC0, AT91SAM9261_ID_TC1, AT91SAM9261_ID_TC2 }, + .clk = { &tc0_clk, &tc1_clk, &tc2_clk }, + } +}; + +#define at91sam9261_tc_init() atmel_tc_init(at91sam9261_tcblocks, ARRAY_SIZE(at91sam9261_tcblocks)) + +#else +#define at91sam9261_tc_init() do {} while(0) +#endif + + +/* -------------------------------------------------------------------- * AT91SAM9261 processor initialization * -------------------------------------------------------------------- */ @@ -267,6 +289,9 @@ void __init at91sam9261_initialize(unsig /* Register GPIO subsystem */ at91_gpio_init(at91sam9261_gpio, 3); + + /* Initialize the Timer/Counter blocks */ + at91sam9261_tc_init(); } /* -------------------------------------------------------------------- @@ -279,25 +304,25 @@ void __init at91sam9261_initialize(unsig static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { 7, /* Advanced Interrupt Controller */ 7, /* System Peripherals */ - 0, /* Parallel IO Controller A */ - 0, /* Parallel IO Controller B */ - 0, /* Parallel IO Controller C */ - 0, - 6, /* USART 0 */ - 6, /* USART 1 */ - 6, /* USART 2 */ + 1, /* Parallel IO Controller A */ + 1, /* Parallel IO Controller B */ + 1, /* Parallel IO Controller C */ + 0, + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ 0, /* Multimedia Card Interface */ - 4, /* USB Device Port */ - 0, /* Two-Wire Interface */ - 6, /* Serial Peripheral Interface 0 */ - 6, /* Serial Peripheral Interface 1 */ - 5, /* Serial Synchronous Controller 0 */ - 5, /* Serial Synchronous Controller 1 */ - 5, /* Serial Synchronous Controller 2 */ + 2, /* USB Device Port */ + 6, /* Two-Wire Interface */ + 5, /* Serial Peripheral Interface 0 */ + 5, /* Serial Peripheral Interface 1 */ + 4, /* Serial Synchronous Controller 0 */ + 4, /* Serial Synchronous Controller 1 */ + 4, /* Serial Synchronous Controller 2 */ 0, /* Timer Counter 0 */ 0, /* Timer Counter 1 */ 0, /* Timer Counter 2 */ - 3, /* USB Host port */ + 2, /* USB Host port */ 3, /* LCD Controller */ 0, 0, Index: arch/arm/mach-at91/at91sam9260_devices.c =================================================================== --- a/arch/arm/mach-at91/at91sam9260_devices.c (revision 2376) +++ b/arch/arm/mach-at91/at91sam9260_devices.c (revision 2386) @@ -524,6 +524,32 @@ void __init at91_init_leds(u8 cpu_led, u #endif +#if defined(CONFIG_NEW_LEDS) + +static struct platform_device at91_leds = { + .name = "at91_leds", + .id = -1, +}; + +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) +{ + if (!nr) + return; + + at91_leds.dev.platform_data = leds; + + for ( ; nr; nr--, leds++) { + leds->index = nr; /* first record stores number of leds */ + at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0); + } + + platform_device_register(&at91_leds); +} +#else +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {} +#endif + + /* -------------------------------------------------------------------- * UART * -------------------------------------------------------------------- */ Index: arch/arm/mach-at91/at91sam9261_devices.c =================================================================== --- a/arch/arm/mach-at91/at91sam9261_devices.c (revision 2376) +++ b/arch/arm/mach-at91/at91sam9261_devices.c (revision 2386) @@ -14,6 +14,9 @@ #include #include +#include + +#include