diff -urN -x CVS linux-2.6.17-san/arch/arm/Kconfig linux-2.6.17-rc/arch/arm/Kconfig --- linux-2.6.17-san/arch/arm/Kconfig Wed Jun 21 14:36:45 2006 +++ linux-2.6.17-rc/arch/arm/Kconfig Fri May 26 21:18:41 2006 @@ -270,6 +270,12 @@ Say Y here if you intend to run this kernel on an Atmel AT91 System-on-Chip board. +config ARCH_KS8695 + bool "Micrel/Kendin KS8695" + help + Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based + System-on-Chip devices. + endchoice source "arch/arm/mach-clps711x/Kconfig" @@ -314,6 +320,8 @@ source "arch/arm/mach-at91rm9200/Kconfig" +source "arch/arm/mach-ks8695/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool @@ -359,7 +367,7 @@ bool config PCI - bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB + bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_KS8695 help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside diff -urN -x CVS linux-2.6.17-san/arch/arm/Makefile linux-2.6.17-rc/arch/arm/Makefile --- linux-2.6.17-san/arch/arm/Makefile Wed Jun 21 14:36:45 2006 +++ linux-2.6.17-rc/arch/arm/Makefile Wed Jun 21 14:15:57 2006 @@ -116,6 +116,7 @@ machine-$(CONFIG_ARCH_REALVIEW) := realview machine-$(CONFIG_ARCH_AT91) := at91rm9200 machine-$(CONFIG_ARCH_EP93XX) := ep93xx + machine-$(CONFIG_ARCH_KS8695) := ks8695 ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. diff -urN -x CVS linux-2.6.17-san/arch/arm/boot/compressed/Makefile linux-2.6.17-rc/arch/arm/boot/compressed/Makefile --- linux-2.6.17-san/arch/arm/boot/compressed/Makefile Wed Jun 21 13:56:09 2006 +++ linux-2.6.17-rc/arch/arm/boot/compressed/Makefile Tue May 16 16:45:44 2006 @@ -50,6 +50,10 @@ OBJS += head-at91rm9200.o endif +ifeq ($(CONFIG_ARCH_KS8695),y) +OBJS += head-ks8695.o +endif + ifeq ($(CONFIG_CPU_BIG_ENDIAN),y) OBJS += big-endian.o endif diff -urN -x CVS linux-2.6.17-san/arch/arm/boot/compressed/head-ks8695.S linux-2.6.17-rc/arch/arm/boot/compressed/head-ks8695.S --- linux-2.6.17-san/arch/arm/boot/compressed/head-ks8695.S Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/boot/compressed/head-ks8695.S Thu May 18 15:40:19 2006 @@ -0,0 +1,70 @@ +/* + * linux/arch/arm/boot/compressed/head-ks8695.S + * + * Copyright (C) 2006 SAN People + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include + + .section ".start", "ax" + + @ Micrel Development board : 180 + mov r3, #(MACH_TYPE_KS8695 & 0xff) + orr r3, r3, #(MACH_TYPE_KS8695 & 0xff00) + cmp r7, r3 + beq 99f + + @ Secure Computing SG300 : 408 + mov r3, #(MACH_TYPE_LITE300 & 0xff) + orr r3, r3, #(MACH_TYPE_LITE300 & 0xff00) + cmp r7, r3 + beq 99f + + @ OpenGear CM4008 : 624 + mov r3, #(MACH_TYPE_CM4008 & 0xff) + orr r3, r3, #(MACH_TYPE_CM4008 & 0xff00) + cmp r7, r3 + beq 99f + + @ Peplink Manga : 657 + mov r3, #(MACH_TYPE_MANGA_KS8695 & 0xff) + orr r3, r3, #(MACH_TYPE_MANGA_KS8695 & 0xff00) + cmp r7, r3 + beq 99f + + @ OpenGear CM41xx : 672 + mov r3, #(MACH_TYPE_CM41XX & 0xff) + orr r3, r3, #(MACH_TYPE_CM41XX & 0xff00) + cmp r7, r3 + beq 99f + + @ Secure Computing SE4200 : 809 + mov r3, #(MACH_TYPE_SE4200 & 0xff) + orr r3, r3, #(MACH_TYPE_SE4200 & 0xff00) + cmp r7, r3 + beq 99f + + @ OpenGear CM4002 : 876 + mov r3, #(MACH_TYPE_CM4002 & 0xff) + orr r3, r3, #(MACH_TYPE_CM4002 & 0xff00) + cmp r7, r3 + beq 99f + + @ DLink DSM320 : ??? +@ mov r3, #(MACH_TYPE_DSM320 & 0xff) +@ orr r3, r3, #(MACH_TYPE_DSM320 & 0xff00) +@ cmp r7, r3 +@ beq 99f + + + @ Unknown board, use Micrel Development board + mov r7, #(MACH_TYPE_KS8695 & 0xff) + orr r7, r7, #(MACH_TYPE_KS8695 & 0xff00) + +99: diff -urN -x CVS linux-2.6.17-san/arch/arm/configs/ks8695_defconfig linux-2.6.17-rc/arch/arm/configs/ks8695_defconfig --- linux-2.6.17-san/arch/arm/configs/ks8695_defconfig Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/configs/ks8695_defconfig Thu May 25 15:43:19 2006 @@ -0,0 +1,881 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.17-rc4 +# Thu May 25 15:42:51 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_VECTORS_BASE=0xffff0000 + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set +CONFIG_OBSOLETE_INTERMODULE=y + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_AT91 is not set +CONFIG_ARCH_KS8695=y + +# +# Kendin/Micrel KS8695 Implementations +# +CONFIG_MACH_KS8695=y +# CONFIG_MACH_DSM320 is not set +# CONFIG_MACH_CM4002 is not set +# CONFIG_MACH_CM4008 is not set +# CONFIG_MACH_CM40xx is not set +# CONFIG_MACH_LITE300 is not set +# CONFIG_MACH_SE4200 is not set +# CONFIG_MACH_MANGA_KS8695 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM922T=y +CONFIG_CPU_32v4=y +CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_CACHE_V4WT=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_DEBUG=y + +# +# PCCARD (PCMCIA/CardBus) support +# +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y +CONFIG_CARDBUS=y + +# +# PC-card bridges +# +CONFIG_YENTA=y +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_TOSHIBA=y +# CONFIG_PD6729 is not set +# CONFIG_I82092 is not set +CONFIG_PCCARD_NONSTATIC=y + +# +# Kernel Features +# +# CONFIG_PREEMPT is not set +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +CONFIG_ARM_KS8695_ETHER=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_NET_PCI is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_KS8695=y +CONFIG_SERIAL_KS8695_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Misc devices +# + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_WAITQ is not set +# CONFIG_DEBUG_ERRORS is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/Kconfig linux-2.6.17-rc/arch/arm/mach-ks8695/Kconfig --- linux-2.6.17-san/arch/arm/mach-ks8695/Kconfig Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/Kconfig Tue May 16 16:45:44 2006 @@ -0,0 +1,58 @@ +if ARCH_KS8695 + +menu "Kendin/Micrel KS8695 Implementations" + +config MACH_KS8695 + bool "KS8695 development board" + help + Say 'Y' here if you want your kernel to run on the original + Kendin-Micrel KS8695 development board. + +config MACH_DSM320 + bool "DLink DSM320 Media Player" + help + Say 'Y' here if you want your kernel to run on the DLink DSM320 + Media Player. + +config MACH_CM4002 + bool "OpenGear CM4002" + help + Say 'Y' here if you want your kernel to support the OpenGear + CM4002 Secure Access Server. See http://www.opengear.com for + more details. + +config MACH_CM4008 + bool "OpenGear CM4008" + help + Say 'Y' here if you want your kernel to support the OpenGear + CM4008 Console Server. See http://www.opengear.com for more + details. + +config MACH_CM40xx + bool "OpenGear CM40xx" + help + Say 'Y' here if you want your kernel to support the OpenGear + CM4016 or CM4048 Console Servers. See http://www.opengear.com for + more details. + +config MACH_LITE300 + bool "Secure Computing / CyberGuard SG300" + help + Say 'Y' here if you want your kernel to support the Secure + Computing / CyberGuard / SnapGear SG300 VPN Internet Router. + See http://www.securecomputing.com for more details. + +config MACH_SE4200 + bool "Secure Computing / CyberGuard SE4200" + help + Say 'Y' here if you want your kernel to support the Secure + Computing / CyberGuard / SnapGear SE4200 Secure Wireless VPN + Internet Router. See http://www.securecomputing.com for more + details. + +config MACH_MANGA_KS8695 + bool "PePLink MANGA" + +endmenu + +endif diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/Makefile linux-2.6.17-rc/arch/arm/mach-ks8695/Makefile --- linux-2.6.17-san/arch/arm/mach-ks8695/Makefile Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/Makefile Fri Jun 16 12:42:40 2006 @@ -0,0 +1,22 @@ +# arch/arm/mach-ks8695/Makefile +# +# Makefile for KS8695 architecture support +# + +obj-y := cpu.o irq.o time.o gpio.o devices.o +obj-m := +obj-n := +obj- := + +# PCI support is optional +obj-$(CONFIG_PCI) += pci.o + +# Board-specific support +obj-$(CONFIG_MACH_KS8695) += board-micrel.o +obj-$(CONFIG_MACH_DSM320) += board-dsm320.o +obj-$(CONFIG_MACH_CM4002) += board-opengear.o +obj-$(CONFIG_MACH_CM4008) += board-opengear.o +obj-$(CONFIG_MACH_CM40xx) += board-opengear.o +obj-$(CONFIG_MACH_LITE300) += board-securecomputing.o +obj-$(CONFIG_MACH_SE4200) += board-securecomputing.o +obj-$(CONFIG_MACH_MANGA_KS8695) += board-manga.o diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/Makefile.boot linux-2.6.17-rc/arch/arm/mach-ks8695/Makefile.boot --- linux-2.6.17-san/arch/arm/mach-ks8695/Makefile.boot Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/Makefile.boot Tue May 16 16:45:44 2006 @@ -0,0 +1,8 @@ +# Note: the following conditions must always be true: +# ZRELADDR == virt_to_phys(TEXTADDR) +# PARAMS_PHYS must be within 4MB of ZRELADDR +# INITRD_PHYS must be in RAM + + zreladdr-y := 0x00008000 +params_phys-y := 0x00000100 +initrd_phys-y := 0x00800000 diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/board-dsm320.c linux-2.6.17-rc/arch/arm/mach-ks8695/board-dsm320.c --- linux-2.6.17-san/arch/arm/mach-ks8695/board-dsm320.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/board-dsm320.c Wed Jun 14 12:22:16 2006 @@ -0,0 +1,56 @@ +/* + * arch/arm/mach-ks8695/board-dsm320.c + * + * Copyright (c) 2003-2005 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include + +#include "board.h" + +static void dsm320_init(void) +{ + printk(KERN_INFO "DSM320 initialising\n"); + +#ifdef CONFIG_PCI + ks8695_init_pci(PBM_MINIPCI); +#endif +} + +static void dsm320_fixup(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ +} + +MACHINE_START(DSM320, "DLink-DSM320") + /* Maintainer: Ben Dooks */ + .phys_io = KS8695_IO_PA, + .io_pg_offst = (KS8695_IO_VA >> 18) & 0xfffc, + .boot_params = KS8695_SDRAM_PA + 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = dsm320_init, + .fixup = dsm320_fixup, + .timer = &ks8695_timer, +MACHINE_END diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/board-manga.c linux-2.6.17-rc/arch/arm/mach-ks8695/board-manga.c --- linux-2.6.17-san/arch/arm/mach-ks8695/board-manga.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/board-manga.c Wed Jun 14 12:22:24 2006 @@ -0,0 +1,50 @@ +/* + * arch/arm/mach-ks8695/board-manga.c + * + * Copyright (c) 2003-2005 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include + +#include "board.h" + +static void manga_init(void) +{ + printk(KERN_INFO "PePLink Manga initialising\n"); + +#ifdef CONFIG_PCI + ks8695_init_pci(PBM_MINIPCI); +#endif +} + +MACHINE_START(MANGA_KS8695, "PePLink Manga") + /* Maintainer: Lennert Buytenhek */ + .phys_io = KS8695_IO_PA, + .io_pg_offst = (KS8695_IO_VA >> 18) & 0xfffc, + .boot_params = KS8695_SDRAM_PA + 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = manga_init, + .timer = &ks8695_timer, +MACHINE_END diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/board-micrel.c linux-2.6.17-rc/arch/arm/mach-ks8695/board-micrel.c --- linux-2.6.17-san/arch/arm/mach-ks8695/board-micrel.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/board-micrel.c Wed Jun 14 12:22:33 2006 @@ -0,0 +1,51 @@ +/* + * arch/arm/mach-ks8695/board-micrel.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include +#include + +#include "board.h" + + +static void micrel_init(void) +{ + printk(KERN_INFO "Micrel KS8695 Development Board initializing\n"); + +#ifdef CONFIG_PCI + ks8695_init_pci(PBM_MINIPCI); +#endif + + /* Add devices */ + ks8695_add_device_wan(); /* eth0 = WAN */ + ks8695_add_device_lan(); /* eth1 = LAN */ +} + +MACHINE_START(KS8695, "KS8695 Centaur Development Board") + /* Maintainer: Micrel Semiconductor Inc. */ + .phys_io = KS8695_IO_PA, + .io_pg_offst = (KS8695_IO_VA >> 18) & 0xfffc, + .boot_params = KS8695_SDRAM_PA + 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = micrel_init, + .timer = &ks8695_timer, +MACHINE_END diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/board-opengear.c linux-2.6.17-rc/arch/arm/mach-ks8695/board-opengear.c --- linux-2.6.17-san/arch/arm/mach-ks8695/board-opengear.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/board-opengear.c Wed Jun 14 12:22:41 2006 @@ -0,0 +1,85 @@ +/* + * arch/arm/mach-ks8695/board-opengear.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include +#include + +#include "board.h" + + + +#ifdef CONFIG_MACH_CM4002 +static void init_cm4002(void) +{ + /* Add devices */ + ks8695_add_device_lan(); /* 1 port only. eth0 = WAN */ +} + +MACHINE_START(CM4002, "OpenGear/CM4002") + /* OpenGear Inc. */ + .phys_io = KS8695_IO_PA, + .io_pg_offst = ((KS8695_IO_VA >> 18) & 0xfffc), + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .timer = &ks8695_timer, + .init_machine = init_cm4002, + .boot_params = KS8695_SDRAM_PA + 0x100, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_CM4008 +static void init_cm4008(void) +{ + /* Add devices */ + ks8695_add_device_lan(); /* 1 port only. eth0 = LAN */ +} + +MACHINE_START(CM4008, "OpenGear/CM4008") + /* OpenGear Inc. */ + .phys_io = KS8695_IO_PA, + .io_pg_offst = ((KS8695_IO_VA >> 18) & 0xfffc), + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .timer = &ks8695_timer, + .init_machine = init_cm4008, + .boot_params = KS8695_SDRAM_PA + 0x100, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_CM41xx +static void init_cm41xx(void) +{ + /* Add devices */ + ks8695_add_device_lan(); /* 1 port only. eth0 = LAN */ +} + +MACHINE_START(CM41xx, "OpenGear/CM41xx") + /* OpenGear Inc. */ + .phys_io = KS8695_IO_PA, + .io_pg_offst = ((KS8695_IO_VA >> 18) & 0xfffc), + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .timer = &ks8695_timer, + .init_machine = init_cm41xx, + .boot_params = KS8695_SDRAM_PA + 0x100, +MACHINE_END +#endif diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/board-securecomputing.c linux-2.6.17-rc/arch/arm/mach-ks8695/board-securecomputing.c --- linux-2.6.17-san/arch/arm/mach-ks8695/board-securecomputing.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/board-securecomputing.c Wed Jun 14 12:22:47 2006 @@ -0,0 +1,61 @@ +/* + * arch/arm/mach-ks8695/board-micrel.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include +#include + +#include "board.h" + + +static void securecomputing_init(void) +{ + + /* Add devices */ + ks8695_add_device_lan(); /* eth0 = LAN */ + ks8695_add_device_wan(); /* eth1 = WAN */ +} + +#ifdef CONFIG_MACH_LITE300 +MACHINE_START(LITE300, "Secure Computing SG300") + /* Secure Computing Inc. */ + .phys_io = KS8695_IO_PA, + .io_pg_offst = ((KS8695_IO_VA >> 18) & 0xfffc), + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .timer = &ks8695_timer, + .init_machine = securecomputing_init, + .boot_params = KS8695_SDRAM_PA + 0x100, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_SE4200 +MACHINE_START(SE4200, "Secure Computing SE4200") + /* Secure Computing Inc. */ + .phys_io = KS8695_IO_PA, + .io_pg_offst = ((KS8695_IO_VA >> 18) & 0xfffc), + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .timer = &ks8695_timer, + .init_machine = securecomputing_init, + .boot_params = KS8695_SDRAM_PA + 0x100, +MACHINE_END +#endif diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/board.h linux-2.6.17-rc/arch/arm/mach-ks8695/board.h --- linux-2.6.17-san/arch/arm/mach-ks8695/board.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/board.h Tue May 16 16:45:44 2006 @@ -0,0 +1,16 @@ +/* + * arch/arm/mach-ks8695/board.h + * + * Copyright (c) 2006 Ben Dooks + * Copyright (c) 2006 Simtec Electronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. +*/ + +extern __init void ks8695_map_io(void); +extern __init void ks8695_init_irq(void); +extern __init void ks8695_init_pci(unsigned long reg_pbm); +extern struct sys_timer ks8695_timer; diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/cpu.c linux-2.6.17-rc/arch/arm/mach-ks8695/cpu.c --- linux-2.6.17-san/arch/arm/mach-ks8695/cpu.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/cpu.c Wed Jun 14 12:23:18 2006 @@ -0,0 +1,84 @@ +/* + * arch/arm/mach-ks8695/cpu.c + * + * Copyright (c) 2006 Ben Dooks + * Copyright (c) 2006 Simtec Electronics + * http://www.simtec.co.uk/products/SWLINUX/ + * Ben Dooks + * + * KS8695 CPU support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include +#include + +#include +#include + +#include "board.h" + +static struct __initdata map_desc ks8695_io_desc[] = { + { + .virtual = KS8695_IO_VA, + .pfn = __phys_to_pfn(KS8695_IO_PA), + .length = KS8695_IO_SIZE, + .type = MT_DEVICE, + } +}; + +static void __init ks8695_processor_info(void) +{ + unsigned long id, rev; + + id = __raw_readl(KS8695_MISC_VA + KS8695_DID); + rev = __raw_readl(KS8695_MISC_VA + KS8695_RID); + + printk("KS8695 ID=%04lx SubID=%02lx Revision=%02lx\n", (id & DID_ID), (rev & RID_SUBID), (rev & RID_REVISION)); +} + +static unsigned int sysclk[8] = { 125000000, 100000000, 62500000, 50000000, 41700000, 33300000, 31300000, 25000000 }; +static unsigned int cpuclk[8] = { 166000000, 166000000, 83000000, 83000000, 55300000, 55300000, 41500000, 41500000 }; + +static void __init ks8695_clock_info(void) +{ + unsigned int scdc = __raw_readl(KS8695_SYS_VA + KS8695_CLKCON) & CLKCON_SCDC; + + printk("Clocks: System %u MHz, CPU %u MHz\n", + sysclk[scdc] / 1000000, cpuclk[scdc] / 1000000); +} + +void __init ks8695_map_io(void) +{ + iotable_init(ks8695_io_desc, ARRAY_SIZE(ks8695_io_desc)); + + ks8695_processor_info(); + ks8695_clock_info(); +} diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/devices.c linux-2.6.17-rc/arch/arm/mach-ks8695/devices.c --- linux-2.6.17-san/arch/arm/mach-ks8695/devices.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/devices.c Fri Jun 16 13:04:04 2006 @@ -0,0 +1,161 @@ +/* + * arch/arm/mach-ks8695/devices.c + * + * Copyright (C) 2006 Andrew Victor + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include + +#include +#include + +#include +#include +#include + + +/* -------------------------------------------------------------------- + * Ethernet + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_ARM_KS8695_ETHER) || defined(CONFIG_ARM_KS8695_ETHER_MODULE) +static u64 eth_dmamask = 0xffffffffUL; + +static struct resource ks8695_wan_resources[] = { + [0] = { + .start = KS8695_WAN_VA, + .end = KS8695_WAN_VA + 0x00ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "WAN RX", + .start = KS8695_IRQ_WAN_RX_STATUS, + .end = KS8695_IRQ_WAN_RX_STATUS, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .name = "WAN TX", + .start = KS8695_IRQ_WAN_TX_STATUS, + .end = KS8695_IRQ_WAN_TX_STATUS, + .flags = IORESOURCE_IRQ, + }, + [3] = { + .name = "WAN Link", + .start = KS8695_IRQ_WAN_LINK, + .end = KS8695_IRQ_WAN_LINK, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ks8695_wan_device = { + .name = "ks8695_ether", + .id = 0, + .dev = { + .dma_mask = ð_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = ks8695_wan_resources, + .num_resources = ARRAY_SIZE(ks8695_wan_resources), +}; + + +static struct resource ks8695_lan_resources[] = { + [0] = { + .start = KS8695_LAN_VA, + .end = KS8695_LAN_VA + 0x00ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "LAN RX", + .start = KS8695_IRQ_LAN_RX_STATUS, + .end = KS8695_IRQ_LAN_RX_STATUS, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .name = "LAN TX", + .start = KS8695_IRQ_LAN_TX_STATUS, + .end = KS8695_IRQ_LAN_TX_STATUS, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ks8695_lan_device = { + .name = "ks8695_ether", + .id = 1, + .dev = { + .dma_mask = ð_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = ks8695_lan_resources, + .num_resources = ARRAY_SIZE(ks8695_lan_resources), +}; + + +static struct resource ks8695_hpna_resources[] = { + [0] = { + .start = KS8695_HPNA_VA, + .end = KS8695_HPNA_VA + 0x00ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "HPNA RX", + .start = KS8695_IRQ_HPNA_RX_STATUS, + .end = KS8695_IRQ_HPNA_RX_STATUS, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .name = "HPNA TX", + .start = KS8695_IRQ_HPNA_TX_STATUS, + .end = KS8695_IRQ_HPNA_TX_STATUS, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ks8695_hpna_device = { + .name = "ks8695_ether", + .id = 2, + .dev = { + .dma_mask = ð_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = ks8695_hpna_resources, + .num_resources = ARRAY_SIZE(ks8695_hpna_resources), +}; + +void __init ks8695_add_device_wan(void) +{ + platform_device_register(&ks8695_wan_device); +} + +void __init ks8695_add_device_lan(void) +{ + platform_device_register(&ks8695_lan_device); +} + +void __init ks8696_add_device_hpna(void) +{ + platform_device_register(&ks8695_hpna_device); +} +#else +void __init ks8695_add_device_wan(void) {} +void __init ks8695_add_device_lan(void) {} +void __init ks8696_add_device_hpna(void) {} +#endif + +/* -------------------------------------------------------------------- */ + diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/gpio.c linux-2.6.17-rc/arch/arm/mach-ks8695/gpio.c --- linux-2.6.17-san/arch/arm/mach-ks8695/gpio.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/gpio.c Fri Jun 16 13:06:21 2006 @@ -0,0 +1,168 @@ +/* + * arch/arm/mach-ks8695/gpio.c + * + * Copyright (C) 2006 Andrew Victor + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + + +#define KS8695_MAX_GPIO 16 +#define KS8605_MAX_GPIO_FUNC 6 +#define KS8695_MAX_GPIO_IRQ 4 + +/* + * Configure a GPIO line for either GPIO function, or its internal + * function (Interrupt, Timer, etc). + */ +static void ks8695_gpio_mode(unsigned int pin, unsigned int gpio) +{ + unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN }; + unsigned long x; + + if (pin >= KS8605_MAX_GPIO_FUNC) + return; + + x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC); + if (gpio) /* set bit to 0 for normal GPIO */ + x &= ~enable[pin]; + else /* set bit to 1 for internal function */ + x |= enable[pin]; + __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPC); +} + +/* + * Configure the GPIO line as an input. + */ +int __init_or_module ks8695_set_gpio_input(unsigned int pin) +{ + unsigned long x; + + if (pin >= KS8695_MAX_GPIO) + return -EINVAL; + + /* set pin to GPIO mode */ + ks8695_gpio_mode(pin, 1); + + /* set pin as input */ + x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); + x &= ~IOPM_(pin); + __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); + + return 0; +} +EXPORT_SYMBOL(ks8695_set_gpio_input); + +/* + * Configure the GPIO line as an output, with default state. + */ +int __init_or_module ks8695_set_gpio_output(unsigned int pin, unsigned int state) +{ + unsigned long x; + + if (pin >= KS8695_MAX_GPIO) + return -EINVAL; + + /* set pin to GPIO mode */ + ks8695_gpio_mode(pin, 1); + + /* set line state */ + x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); + if (state) + x |= (1 << pin); + else + x &= ~(1 << pin); + __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD); + + /* set pin as output */ + x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); + x |= IOPM_(pin); + __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); + + return 0; +} +EXPORT_SYMBOL(ks8695_set_gpio_output); + +/* + * Set the state of an output GPIO line. + */ +int ks8695_set_gpio_value(unsigned int pin, unsigned int state) +{ + unsigned long x; + + if (pin >= KS8695_MAX_GPIO) + return -EINVAL; + + /* set output line state */ + x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); + if (state) + x |= (1 << pin); + else + x &= ~(1 << pin); + __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD); + + return 0; +} +EXPORT_SYMBOL(ks8695_set_gpio_value); + +/* + * Read the state of a GPIO line. + */ +int ks8695_get_gpio_value(unsigned int pin) +{ + unsigned long x; + + if (pin >= KS8695_MAX_GPIO) + return -EINVAL; + + x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); + return (x & (1 << pin)) != 0; +} +EXPORT_SYMBOL(ks8695_get_gpio_value); + +/* + * Configure GPIO pin as external interrupt source. + */ +int ks8695_gpio_interrupt(unsigned int pin) +{ + unsigned long x; + + if (pin >= KS8695_MAX_GPIO_IRQ) + return -EINVAL; + + /* set pin as input */ + x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); + x &= ~IOPM_(pin); + __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); + + /* enable interrupt */ + ks8695_gpio_mode(pin, 0); + + return 0; +} +EXPORT_SYMBOL(ks8695_gpio_interrupt); + diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/irq.c linux-2.6.17-rc/arch/arm/mach-ks8695/irq.c --- linux-2.6.17-san/arch/arm/mach-ks8695/irq.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/irq.c Thu Jun 15 14:49:20 2006 @@ -0,0 +1,181 @@ +/* + * arch/arm/mach-ks8695/irq.c + * + * Copyright (c) 2006 Ben Dooks + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include +#include + +static void ks8695_irq_mask(unsigned int irqno) +{ + unsigned long inten; + + inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN); + inten &= ~(1 << irqno); + + __raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN); +} + +static void ks8695_irq_unmask(unsigned int irqno) +{ + unsigned long inten; + + // Need better unstanding of arm/kernel/irq.c to figure out why this one is special. + // Set IRQF_NOAUTOEN for this one.... ?? + if (irqno == KS8695_IRQ_UART_TX) + return; + + inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN); + inten |= (1 << irqno); + + __raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN); +} + +static void ks8695_irq_ack(unsigned int irqno) +{ + __raw_writel((1 << irqno), KS8695_IRQ_VA + KS8695_INTST); +} + + +static struct irqchip ks8695_irq_level_chip; +static struct irqchip ks8695_irq_edge_chip; + + +static int ks8695_irq_set_type(unsigned int irqno, unsigned int type) +{ + unsigned long ctrl, mode; + unsigned short level_triggered = 0; + + ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC); + + switch (type) { + case IRQT_HIGH: + mode = IOPC_TM_HIGH; + level_triggered = 1; + break; + case IRQT_LOW: + mode = IOPC_TM_LOW; + level_triggered = 1; + break; + case IRQT_RISING: + mode = IOPC_TM_RISING; + break; + case IRQT_FALLING: + mode = IOPC_TM_FALLING; + break; + case IRQT_BOTHEDGE: + mode = IOPC_TM_EDGE; + break; + default: + return -EINVAL; + } + + switch (irqno) { + case KS8695_IRQ_EXTERN0: + ctrl &= ~IOPC_IOEINT0TM; + ctrl |= IOPC_IOEINT0_MODE(mode); + break; + case KS8695_IRQ_EXTERN1: + ctrl &= ~IOPC_IOEINT1TM; + ctrl |= IOPC_IOEINT1_MODE(mode); + break; + case KS8695_IRQ_EXTERN2: + ctrl &= ~IOPC_IOEINT2TM; + ctrl |= IOPC_IOEINT2_MODE(mode); + break; + case KS8695_IRQ_EXTERN3: + ctrl &= ~IOPC_IOEINT3TM; + ctrl |= IOPC_IOEINT3_MODE(mode); + break; + default: + return -EINVAL; + } + + if (level_triggered) { + set_irq_chip(irqno, &ks8695_irq_level_chip); + set_irq_handler(irqno, do_level_IRQ); + } + else { + set_irq_chip(irqno, &ks8695_irq_edge_chip); + set_irq_handler(irqno, do_edge_IRQ); + } + + __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC); + return 0; +} + +static struct irqchip ks8695_irq_level_chip = { + .ack = ks8695_irq_mask, + .mask = ks8695_irq_mask, + .unmask = ks8695_irq_unmask, + .set_type = ks8695_irq_set_type, +}; + +static struct irqchip ks8695_irq_edge_chip = { + .ack = ks8695_irq_ack, + .mask = ks8695_irq_mask, + .unmask = ks8695_irq_unmask, + .set_type = ks8695_irq_set_type, +}; + +void __init ks8695_init_irq(void) +{ + unsigned int irq; + + /* Disable all interrupts initially */ + __raw_writel(0, KS8695_IRQ_VA + KS8695_INTMC); + __raw_writel(0, KS8695_IRQ_VA + KS8695_INTEN); + + for (irq = 0; irq < NR_IRQS; irq++) { + switch (irq) { + /* Level-triggered interrupts */ + case KS8695_IRQ_BUS_ERROR: + case KS8695_IRQ_UART_MODEM_STATUS: + case KS8695_IRQ_UART_LINE_STATUS: + case KS8695_IRQ_UART_RX: + case KS8695_IRQ_COMM_TX: + case KS8695_IRQ_COMM_RX: + set_irq_chip(irq, &ks8695_irq_level_chip); + set_irq_handler(irq, do_level_IRQ); + break; + + /* Edge-triggered interrupts */ + default: + ks8695_irq_ack(irq); /* clear pending bit */ + set_irq_chip(irq, &ks8695_irq_edge_chip); + set_irq_handler(irq, do_edge_IRQ); + } + + set_irq_flags(irq, IRQF_VALID); + } +} diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/pci.c linux-2.6.17-rc/arch/arm/mach-ks8695/pci.c --- linux-2.6.17-san/arch/arm/mach-ks8695/pci.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/pci.c Tue Jun 20 16:06:24 2006 @@ -0,0 +1,274 @@ +/* + * arch/arm/mach-ks8695/pci.c + * + * Copyright (C) 2003, Micrel Semiconductors + * Copyright (C) 2006, Greg Ungerer + * Copyright (C) 2006m Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int pci_dbg = 1; +static int pci_cfg_dbg = 0; + + +static void ks8695_pci_setupconfig(unsigned int bus_nr, unsigned int devfn, unsigned int where) +{ + unsigned long pbca; + + pbca = PBCA_ENABLE | (where & ~3); + pbca |= PCI_SLOT(devfn) << 11 ; + pbca |= PCI_FUNC(devfn) << 8; + pbca |= bus_nr << 16; + + if (bus_nr == 0) { + /* use Type-0 transaction */ + __raw_writel(pbca, KS8695_PCI_VA + KS8695_PBCA); + } + + /* use Type-1 transaction */ + __raw_writel(pbca | PBCA_TYPE1, KS8695_PCI_VA + KS8695_PBCA); +} + + +/* + * The KS8695 datasheet prohibits anything other than 32bit accesses + * to the IO registers, so all our configuration must be done with + * 32bit operations, and the correct bit masking and shifting. + */ + +static int ks8695_pci_readconfig(struct pci_bus *bus, + unsigned int devfn, int where, int size, u32 *value) +{ + ks8695_pci_setupconfig(bus->number, devfn, where); + *value = __raw_readl(KS8695_PCI_VA + KS8695_PBCD); + + switch (size) { + case 4: + break; + case 2: + *value = *value >> ((where & 2) * 8); + *value &= 0xffff; + break; + case 1: + *value = *value >> ((where & 3) * 8); + *value &= 0xff; + break; + } + + if (pci_cfg_dbg) { + printk("read: %d,%08x,%02x,%d: %08x (%08x)\n", + bus->number, devfn, where, size, *value, + __raw_readl(KS8695_PCI_VA + KS8695_PBCD)); + } + + return PCIBIOS_SUCCESSFUL; +} + +static int ks8695_pci_writeconfig(struct pci_bus *bus, + unsigned int devfn, int where, int size, u32 value) +{ + unsigned long tmp; + + if (pci_cfg_dbg) { + printk("write: %d,%08x,%02x,%d: %08x\n", + bus->number, devfn, where, size, value); + } + + ks8695_pci_setupconfig(bus->number, devfn, where); + + switch (size) { + case 4: + __raw_writel(value, KS8695_PCI_VA + KS8695_PBCD); + break; + case 2: + tmp = __raw_readl(KS8695_PCI_VA + KS8695_PBCD); + tmp &= ~(0xffff << ((where & 2) * 8)); + tmp |= value << ((where & 2) * 8); + + __raw_writel(tmp, KS8695_PCI_VA + KS8695_PBCD); + break; + case 1: + tmp = __raw_readl(KS8695_PCI_VA + KS8695_PBCD); + tmp &= ~(0xff << ((where & 3) * 8)); + tmp |= value << ((where & 3) * 8); + + __raw_writel(tmp, KS8695_PCI_VA + KS8695_PBCD); + break; + } + + return PCIBIOS_SUCCESSFUL; +} + +static void ks8695_local_writeconfig(int where, u32 value) +{ + ks8695_pci_setupconfig(0, 0, where); + __raw_writel(value, KS8695_PCI_VA + KS8695_PBCD); +} + + +struct pci_ops ks8695_pci_ops = { + .read = ks8695_pci_readconfig, + .write = ks8695_pci_writeconfig, +}; + +static struct pci_bus *ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys) +{ + return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys); +} + +static struct resource pci_mem = { + .name = "PCI Memory space", + .start = KS8695_PCIMEM_PA, + .end = KS8695_PCIMEM_PA + (KS8695_PCIMEM_SIZE - 1), + .flags = IORESOURCE_MEM, +}; + +static struct resource pci_io = { + .name = "PCI IO space", + .start = KS8695_PCIIO_PA, + .end = KS8695_PCIIO_PA + (KS8695_PCIIO_SIZE - 1), + .flags = IORESOURCE_IO, +}; + +static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys) +{ + if (nr > 0) + return 0; + + request_resource(&iomem_resource, &pci_mem); + request_resource(&ioport_resource, &pci_io); + + sys->resource[0] = &pci_io; + sys->resource[1] = &pci_mem; + sys->resource[2] = NULL; + + /* Assign and enable processor bridge */ + ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA); + + // TODO: Shouldn't this be read-modify-write? + ks8695_local_writeconfig(PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); + + // TODO: Set cache-line size and latency. + + return 1; +} + +static unsigned int size_mask(unsigned long size) +{ + return (~size) + 1; +} + +static void __init ks8695_pci_preinit(void) +{ + /* stage 1 initialization, subid, subdevice = 0x0001 */ + __raw_writel(0x00010001, KS8695_PCI_VA + KS8695_CRCSID); + + /* stage 2 initialization */ + /* prefetch limits with 16 words, retry enable */ + __raw_writel(0x40000000, KS8695_PCI_VA + KS8695_PBCS); + + /* configure memory mapping */ + __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBA); + __raw_writel(size_mask(KS8695_PCIMEM_SIZE), KS8695_PCI_VA + KS8695_PMBAM); + __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBAT); + __raw_writel(0, KS8695_PCI_VA + KS8695_PMBAC); + + /* configure IO mapping */ + __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBA); + __raw_writel(size_mask(KS8695_PCIIO_SIZE), KS8695_PCI_VA + KS8695_PIOBAM); + __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBAT); + __raw_writel(0, KS8695_PCI_VA + KS8695_PIOBAC); + + /* + * EXT0 is used as PCI bus interrupt source. (active low level detection) + */ + ks8695_gpio_interrupt(0); + set_irq_type(KS8695_IRQ_EXTERN0, IRQT_LOW); +} + +void __init ks8695_pci_postinit(void) +{ +} + +static int __init ks8695_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + return KS8695_IRQ_EXTERN0; +} + +void ks8695_show_pciregs(void) +{ + if (!pci_dbg) + return; + + printk(KERN_INFO "PCI: CRCFID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFID)); + printk(KERN_INFO "PCI: CRCFCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS)); + printk(KERN_INFO "PCI: CRCFRV = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFRV)); + printk(KERN_INFO "PCI: CRCFLT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFLT)); + printk(KERN_INFO "PCI: CRCBMA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCBMA)); + printk(KERN_INFO "PCI: CRCSID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCSID)); + printk(KERN_INFO "PCI: CRCFIT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFIT)); + + printk(KERN_INFO "PCI: PBM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBM)); + printk(KERN_INFO "PCI: PBCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBCS)); + + printk(KERN_INFO "PCI: PMBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBA)); + printk(KERN_INFO "PCI: PMBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAC)); + printk(KERN_INFO "PCI: PMBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAM)); + printk(KERN_INFO "PCI: PMBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAT)); + + printk(KERN_INFO "PCI: PIOBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBA)); + printk(KERN_INFO "PCI: PIOBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAC)); + printk(KERN_INFO "PCI: PIOBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAM)); + printk(KERN_INFO "PCI: PIOBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAT)); +} + + +struct hw_pci ks8695_pci __initdata = { + .nr_controllers = 1, + .preinit = ks8695_pci_preinit, + .setup = ks8695_pci_setup, + .scan = ks8695_pci_scan_bus, + .postinit = ks8695_pci_postinit, + .swizzle = pci_std_swizzle, + .map_irq = ks8695_pci_map_irq, +}; + +void __init ks8695_init_pci(unsigned long pbm) +{ + if (__raw_readl(KS8695_PCI_VA + KS8695_CRCFRV) & CFRV_GUEST) { + printk("PCI: KS8695 in guest mode, not initialising\n"); + return; + } + + printk(KERN_INFO "PCI: Initialising\n"); + ks8695_show_pciregs(); + + __raw_writel(pbm, KS8695_PCI_VA + KS8695_PBM); + + pci_common_init(&ks8695_pci); +} diff -urN -x CVS linux-2.6.17-san/arch/arm/mach-ks8695/time.c linux-2.6.17-rc/arch/arm/mach-ks8695/time.c --- linux-2.6.17-san/arch/arm/mach-ks8695/time.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/arch/arm/mach-ks8695/time.c Wed Jun 14 12:24:06 2006 @@ -0,0 +1,117 @@ +/* + * arch/arm/mach-ks8695/time.c + * + * Copyright (c) 2006 Ben Dooks + * Copyright (C) 2006 Simtec Electronics + * Ben Dooks, + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include "board.h" + +/* + * Returns number of ms since last clock interrupt. Note that interrupts + * will have been disabled by do_gettimeoffset() + */ +static unsigned long ks8695_gettimeoffset (void) +{ + unsigned long elapsed, tick2, intpending; + + /* + * Get the current number of ticks. Note that there is a race + * condition between us reading the timer and checking for an + * interrupt. We solve this by ensuring that the counter has not + * reloaded between our two reads. + */ + elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD); + do { + tick2 = elapsed; + intpending = __raw_readl(KS8695_IRQ_VA + KS8695_INTST) & (1 << KS8695_IRQ_TIMER1); + elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD); + } while (elapsed > tick2); + + /* Convert to number of ticks expired (not remaining) */ + elapsed = (CLOCK_TICK_RATE / HZ) - elapsed; + + /* Is interrupt pending? If so, then timer has been reloaded already. */ + if (intpending) + elapsed += (CLOCK_TICK_RATE / HZ); + + /* Convert ticks to usecs */ + return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH; +} + +/* + * IRQ handler for the timer. + */ +static irqreturn_t ks8695_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + write_seqlock(&xtime_lock); + timer_tick(regs); + write_sequnlock(&xtime_lock); + + return IRQ_HANDLED; +} + +static struct irqaction ks8695_timer_irq = { + .name = "ks8695_tick", + .flags = SA_INTERRUPT | SA_TIMER, + .handler = ks8695_timer_interrupt, +}; + +static void ks8695_timer_setup(void) +{ + unsigned long tmout = CLOCK_TICK_RATE / HZ; + unsigned long tmcon; + + /* disable timer1 */ + tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); + __raw_writel(tmcon & ~TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON); + + __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1TC); + __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1PD); + + /* re-enable timer1 */ + __raw_writel(tmcon | TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON); +} + +static void __init ks8695_timer_init (void) +{ + ks8695_timer_setup(); + + /* Enable timer interrupts */ + setup_irq(KS8695_IRQ_TIMER1, &ks8695_timer_irq); +} + +struct sys_timer ks8695_timer = { + .init = ks8695_timer_init, + .offset = ks8695_gettimeoffset, + .resume = ks8695_timer_setup, +}; diff -urN -x CVS linux-2.6.17-san/arch/arm/mm/Kconfig linux-2.6.17-rc/arch/arm/mm/Kconfig --- linux-2.6.17-san/arch/arm/mm/Kconfig Wed Jun 21 14:36:45 2006 +++ linux-2.6.17-rc/arch/arm/mm/Kconfig Tue May 16 16:45:44 2006 @@ -83,8 +83,8 @@ # ARM922T config CPU_ARM922T bool "Support ARM922T processor" if ARCH_INTEGRATOR - depends on ARCH_LH7A40X || ARCH_INTEGRATOR - default y if ARCH_LH7A40X + depends on ARCH_LH7A40X || ARCH_INTEGRATOR || ARCH_KS8695 + default y if ARCH_LH7A40X || ARCH_KS8695 select CPU_32v4 select CPU_ABRT_EV4T select CPU_CACHE_V4WT @@ -94,7 +94,7 @@ help The ARM922T is a version of the ARM920T, but with smaller instruction and data caches. It is used in Altera's - Excalibur XA device family. + Excalibur XA device family and Micrel's KS8695 Centaur. Say Y if you want support for the ARM922T processor. Otherwise, say N. diff -urN -x CVS linux-2.6.17-san/drivers/net/arm/Kconfig linux-2.6.17-rc/drivers/net/arm/Kconfig --- linux-2.6.17-san/drivers/net/arm/Kconfig Wed Jun 21 13:56:44 2006 +++ linux-2.6.17-rc/drivers/net/arm/Kconfig Tue May 16 16:45:44 2006 @@ -39,3 +39,11 @@ help If you wish to compile a kernel for the AT91RM9200 and enable ethernet support, then you should always answer Y to this. + +config ARM_KS8695_ETHER + tristate "KS8695 Ethernet support" + depends on NET_ETHERNET && ARM && ARCH_KS8695 + help + If you wish to compile a kernel for an KS8695-based board + and enable Ethernet support, then select this option. + diff -urN -x CVS linux-2.6.17-san/drivers/net/arm/Makefile linux-2.6.17-rc/drivers/net/arm/Makefile --- linux-2.6.17-san/drivers/net/arm/Makefile Wed Jun 21 13:56:44 2006 +++ linux-2.6.17-rc/drivers/net/arm/Makefile Tue May 16 16:45:44 2006 @@ -8,3 +8,4 @@ obj-$(CONFIG_ARM_ETHER3) += ether3.o obj-$(CONFIG_ARM_ETHER1) += ether1.o obj-$(CONFIG_ARM_AT91_ETHER) += at91_ether.o +obj-$(CONFIG_ARM_KS8695_ETHER) += ks8695_ether.o diff -urN -x CVS linux-2.6.17-san/drivers/net/arm/ks8695_ether.c linux-2.6.17-rc/drivers/net/arm/ks8695_ether.c --- linux-2.6.17-san/drivers/net/arm/ks8695_ether.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/drivers/net/arm/ks8695_ether.c Thu Jun 8 11:49:00 2006 @@ -0,0 +1,1006 @@ +/* + * Ethernet driver for the Kendin/Micrel KS8695. + * + * Copyright (C) 2006 Andrew Victor + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "ks8695_ether.h" + + +#define DRV_NAME "ks8695_ether" +#define DRV_VERSION "0.01" + +/* ..................................................................... */ + +static inline unsigned long ks8695_read(struct net_device *dev, unsigned int reg) +{ + return __raw_readl(dev->base_addr + reg); +} + +static inline void ks8695_write(struct net_device *dev, unsigned int reg, unsigned long value) +{ + __raw_writel(value, dev->base_addr + reg); +} + + +/* ......................... ADDRESS MANAGEMENT ........................ */ + +#define KS8695_NR_ADDRESSES 16 + +/* + * Add the specified multicast addresses to the Additional Station + * Address registers. + */ +static void ks8695_set_mcast_address(struct net_device *dev, struct dev_mc_list *addr, int nr_addr) +{ + unsigned long low, high; + int i; + + /* Set multicast addresses in Additional Station Address registers */ + for (i = 0; i < nr_addr; i++, addr = addr->next) { + if (!addr) break; /* unexpected end of list */ + else if (i == KS8695_NR_ADDRESSES) break; /* too many addresses */ + + low = (addr->dmi_addr[2] << 24) | (addr->dmi_addr[3] << 16) | (addr->dmi_addr[4] << 8) | (addr->dmi_addr[5]); + high = (addr->dmi_addr[0] << 8) | (addr->dmi_addr[1]); + + ks8695_write(dev, KS8695_WMAAL_(i), low); + ks8695_write(dev, KS8695_WMAAH_(i), WMAAH_E | high); + } + + /* Clear the remaining Additional Station Addresses */ + for (; i < KS8695_NR_ADDRESSES; i++) { + ks8695_write(dev, KS8695_WMAAL_(i), 0); + ks8695_write(dev, KS8695_WMAAH_(i), 0); + } +} + +/* + * Enable/Disable promiscuous and multicast modes. + */ +static void ks8695eth_set_multi(struct net_device *dev) +{ + unsigned long ctrl; + + ctrl = ks8695_read(dev, KS8695_WMDRXC); + + if (dev->flags & IFF_PROMISC) /* enable promiscuous mode */ + ctrl |= WMDRXC_WMRA; + else if (dev->flags & ~IFF_PROMISC) /* disable promiscuous mode */ + ctrl &= ~WMDRXC_WMRA; + + if (dev->flags & IFF_ALLMULTI) /* enable all multicast mode */ + ctrl |= WMDRXC_WMRM; + else if (dev->mc_count > KS8695_NR_ADDRESSES) /* more specific multicast addresses than can be handled in hardware */ + ctrl |= WMDRXC_WMRM; + else if (dev->mc_count > 0) { /* enable specific multicasts */ + ctrl &= ~WMDRXC_WMRM; + ks8695_set_mcast_address(dev, dev->mc_list, dev->mc_count); + } + else if (dev->flags & ~IFF_ALLMULTI) { /* disable multicast mode */ + ctrl &= ~WMDRXC_WMRM; + ks8695_set_mcast_address(dev, NULL, 0); + } + + ks8695_write(dev, KS8695_WMDRXC, ctrl); +} + +/* + * Program the hardware MAC address from dev->dev_addr. + */ +static void update_mac_address(struct net_device *dev) +{ + unsigned long low, high; + + low = (dev->dev_addr[2] << 24) | (dev->dev_addr[3] << 16) | (dev->dev_addr[4] << 8) | (dev->dev_addr[5]); + high = (dev->dev_addr[0] << 8) | (dev->dev_addr[1]); + + ks8695_write(dev, KS8695_WMAL, low); + ks8695_write(dev, KS8695_WMAH, high); +} + +/* + * Store the new hardware address in dev->dev_addr, and update the MAC. + */ +static int ks8695eth_set_mac(struct net_device *dev, void* addr) +{ + struct sockaddr *address = addr; + + if (!is_valid_ether_addr(address->sa_data)) + return -EADDRNOTAVAIL; + + memcpy(dev->dev_addr, address->sa_data, dev->addr_len); + update_mac_address(dev); + + printk("%s: Setting MAC address to %02x:%02x:%02x:%02x:%02x:%02x\n", dev->name, + dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], + dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); + + return 0; +} + +/* + * Retrieve the MAC address set by the bootloader. + */ +static void __init get_mac_address(struct net_device *dev) +{ + unsigned char addr[6]; + unsigned long low, high; + + low = ks8695_read(dev, KS8695_WMAL); + high = ks8695_read(dev, KS8695_WMAH); + + addr[0] = (high & 0xff00) >> 8; + addr[1] = (high & 0xff); + addr[2] = (low & 0xff000000) >> 24; + addr[3] = (low & 0xff0000) >> 16; + addr[4] = (low & 0xff00) >> 8; + addr[5] = (low & 0xff); + + if (is_valid_ether_addr(addr)) + memcpy(dev->dev_addr, &addr, 6); +} + + +/* ......................... ETHTOOL SUPPORT ........................... */ + +/* + * Get device-specific settings. + */ +static int ks8695eth_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) +{ + unsigned long ctrl; + + /* the defaults for all ports */ + cmd->supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full + | SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full + | SUPPORTED_TP | SUPPORTED_MII; + cmd->advertising = ADVERTISED_TP | ADVERTISED_MII; + cmd->port = PORT_MII; + cmd->transceiver = XCVR_INTERNAL; + + if (dev->base_addr == KS8695_HPNA_VA) { + cmd->phy_address = 0; + cmd->autoneg = AUTONEG_DISABLE; /* not supported for HPNA */ + + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_HMC); + cmd->speed = (ctrl & HMC_HSS) ? SPEED_100 : SPEED_10; + cmd->duplex = (ctrl & HMC_HDS) ? DUPLEX_FULL : DUPLEX_HALF; + } + else if (dev->base_addr == KS8695_WAN_VA) { + cmd->supported |= (SUPPORTED_Autoneg | SUPPORTED_Pause); + cmd->phy_address = 0; + + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC); + if ((ctrl & WMC_WAND) == 0) { /* auto-negotiation is enabled */ + cmd->advertising |= ADVERTISED_Autoneg; + if (ctrl & WMC_WANA100F) + cmd->advertising |= ADVERTISED_100baseT_Full; + if (ctrl & WMC_WANA100H) + cmd->advertising |= ADVERTISED_100baseT_Half; + if (ctrl & WMC_WANA10F) + cmd->advertising |= ADVERTISED_10baseT_Full; + if (ctrl & WMC_WANA10H) + cmd->advertising |= ADVERTISED_10baseT_Half; + if (ctrl & WMC_WANAP) + cmd->advertising |= ADVERTISED_Pause; + cmd->autoneg = AUTONEG_ENABLE; + + cmd->speed = (ctrl & WMC_WSS) ? SPEED_100 : SPEED_10; + cmd->duplex = (ctrl & WMC_WDS) ? DUPLEX_FULL : DUPLEX_HALF; + } + else { /* auto-negotiation is disabled */ + cmd->autoneg = AUTONEG_DISABLE; + + cmd->speed = (ctrl & WMC_WANF100) ? SPEED_100 : SPEED_10; + cmd->duplex = (ctrl & WMC_WANFF) ? DUPLEX_FULL : DUPLEX_HALF; + } + } + else if (dev->base_addr == KS8695_LAN_VA) { + // TODO for Switch ports + } + + return 0; +} + +/* + * Set device-specific settings. + */ +static int ks8695eth_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) +{ + unsigned long ctrl; + + if ((cmd->speed != SPEED_10) && (cmd->speed != SPEED_100)) + return -EINVAL; + if ((cmd->duplex != DUPLEX_HALF) && (cmd->duplex != DUPLEX_FULL)) + return -EINVAL; + if (cmd->port != PORT_MII) + return -EINVAL; + if (cmd->transceiver != XCVR_INTERNAL) + return -EINVAL; + if ((cmd->autoneg != AUTONEG_DISABLE) && (cmd->autoneg != AUTONEG_ENABLE)) + return -EINVAL; + + if (cmd->autoneg == AUTONEG_ENABLE) { + if ((cmd->advertising & (ADVERTISED_10baseT_Half | + ADVERTISED_10baseT_Full | + ADVERTISED_100baseT_Half | + ADVERTISED_100baseT_Full)) == 0) + return -EINVAL; + + if (dev->base_addr == KS8695_HPNA_VA) + return -EINVAL; /* HPNA does not support auto-negotiation. */ + else if (dev->base_addr == KS8695_WAN_VA) { + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC); + + ctrl &= ~(WMC_WAND | WMC_WANA100F | WMC_WANA100H | WMC_WANA10F | WMC_WANA10H); + if (cmd->advertising & ADVERTISED_100baseT_Full) + ctrl |= WMC_WANA100F; + if (cmd->advertising & ADVERTISED_100baseT_Half) + ctrl |= WMC_WANA100H; + if (cmd->advertising & ADVERTISED_10baseT_Full) + ctrl |= WMC_WANA10F; + if (cmd->advertising & ADVERTISED_10baseT_Half) + ctrl |= WMC_WANA10H; + + ctrl |= WMC_WANR; /* force a re-negotiation */ + __raw_writel(ctrl, KS8695_MISC_VA + KS8695_WMC); + } + else if (dev->base_addr == KS8695_LAN_VA) { + // TODO for Switch ports + } + + } else { + if (dev->base_addr == KS8695_HPNA_VA) { + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_HMC); + + ctrl &= ~(HMC_HSS | HMC_HDS); + if (cmd->speed == SPEED_100) + ctrl |= HMC_HSS; + if (cmd->duplex == DUPLEX_FULL) + ctrl |= HMC_HDS; + + __raw_writel(ctrl, KS8695_MISC_VA + KS8695_HMC); + } + else if (dev->base_addr == KS8695_WAN_VA) { + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC); + + ctrl |= WMC_WAND; /* disable auto-negotiation */ + ctrl &= ~(WMC_WANF100 | WMC_WANFF); + if (cmd->speed == SPEED_100) + ctrl |= WMC_WANF100; + if (cmd->duplex == DUPLEX_FULL) + ctrl |= WMC_WANFF; + + __raw_writel(ctrl, KS8695_MISC_VA + KS8695_WMC); + } + else if (dev->base_addr == KS8695_LAN_VA) { + // TODO for Switch ports + } + } + + return 0; +} + +/* + * Restart the auto-negotiation. + */ +static int ks8695eth_nwayreset(struct net_device *dev) +{ + unsigned long ctrl; + + if (dev->base_addr == KS8695_HPNA_VA) /* HPNA has no auto-negotiation */ + return -EINVAL; + else if (dev->base_addr == KS8695_WAN_VA) { + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC); + + if ((ctrl & WMC_WAND) == 0) + __raw_writel(ctrl | WMC_WANR, KS8695_MISC_VA + KS8695_WMC); + else + return -EINVAL; /* auto-negitiation not enabled */ + } + else if (dev->base_addr == KS8695_LAN_VA) { + // TODO for Switch ports + } + + return 0; +} + +static void ks8695eth_get_pause(struct net_device *dev, struct ethtool_pauseparam *param) +{ + unsigned long ctrl; + + if (dev->base_addr == KS8695_HPNA_VA) + return; + else if (dev->base_addr == KS8695_WAN_VA) { + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC); /* advertise Pause */ + param->autoneg = (ctrl & WMC_WANAP); + + ctrl = ks8695_read(dev, KS8695_WMDRXC); /* current Tx Flow-control */ + param->rx_pause = (ctrl & WMDRXC_WMRFCE); + + ctrl = ks8695_read(dev, KS8695_WMDRXC); /* current Rx Flow-control */ + param->tx_pause = (ctrl & WMDTXC_WMTFCE); + } + else if (dev->base_addr == KS8695_LAN_VA) { + // TODO for Switch ports + } +} + +static int ks8695eth_set_pause(struct net_device *dev, struct ethtool_pauseparam *param) +{ + // TODO. +} + +static u32 ks8695eth_get_link(struct net_device *dev) +{ + unsigned long ctrl; + + if (dev->base_addr == KS8695_HPNA_VA) + return 1; /* HPNA always has link */ + else if (dev->base_addr == KS8695_WAN_VA) { + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC); + return (ctrl & WMC_WLS); + } + else if (dev->base_addr == KS8695_LAN_VA) { + // TODO for Switch ports + } +} + +/* + * Report driver information. + */ +static void ks8695eth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) +{ + strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); + strlcpy(info->version, DRV_VERSION, sizeof(info->version)); + strlcpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info)); +} + +static struct ethtool_ops ks8695eth_ethtool_ops = { + .set_settings = ks8695eth_get_settings, + .set_settings = ks8695eth_set_settings, + .get_drvinfo = ks8695eth_get_drvinfo, + .nway_reset = ks8695eth_nwayreset, + .get_pauseparam = ks8695eth_get_pause, + .set_pauseparam = ks8695eth_set_pause, + .get_link = ks8695eth_get_link, +}; + + +/* ................................ MAC ................................ */ + +/* + * Setup the RX DMA descriptors, and enable and start the DMA receiver. + */ +static void ks8695eth_start_rx(struct net_device *dev) +{ + struct ks8695eth_priv *lp = (struct ks8695ether_priv *) dev->priv; + unsigned long ctrl; + int i; + + /* Setup the DMA descriptors */ + for (i = 0; i < MAX_RX_DESC; i++) { + lp->rxdma[i].length = MAX_RXBUF_SIZE; + lp->rxdma[i].addr = (unsigned long) lp->rxSkb[i].dma; + lp->rxdma[i].next = (unsigned long) lp->rxdma_phys + (sizeof(struct rx_descriptor) * (i+1)); + lp->rxdma[i].status = RDES_OWN; + } + + /* Create ring of DMA descriptors */ + lp->rxdma[MAX_RX_DESC-1].next = (unsigned long) lp->rxdma_phys; /* phys address of 1st descriptor */ + + /* Reset receive index (since hardware was reset) */ + lp->rx_idx = 0; + + /* Program address of 1st descriptor in KS8695 */ + ks8695_write(dev, KS8695_WRDLB, (unsigned long) lp->rxdma_phys); + + /* Enable and start the DMA Receiver */ + ctrl = ks8695_read(dev, KS8695_WMDRXC); + ks8695_write(dev, KS8695_WMDRXC, ctrl | WMDRXC_WMRE); + ks8695_write(dev, KS8695_WMDRSC, 0); +} + +/* + * Stop the DMA receiver. + */ +static void ks8695eth_stop_rx(struct net_device *dev) +{ + unsigned long ctrl; + + /* Disable receive DMA */ + ctrl = ks8695_read(dev, KS8695_WMDRXC); + ks8695_write(dev, KS8695_WMDRXC, ctrl & ~WMDRXC_WMRE); +} + +/* + * Setup the TX DMA descriptors, and enable DMA transmitter. + */ +static void ks8695eth_start_tx(struct net_device *dev) +{ + struct ks8695eth_priv *lp = (struct s8695ether_priv *) dev->priv; + unsigned long ctrl; + int i; + + /* Setup the DMA descriptors */ + for (i = 0; i < MAX_TX_DESC; i++) { + lp->txdma[i].ownership = 0; + lp->txdma[i].status = 0; + lp->txdma[i].addr = 0; + lp->txdma[i].next = (unsigned long) lp->txdma_phys + (sizeof(struct tx_descriptor) * (i+1)); + } + + /* Create ring of DMA descriptors */ + lp->txdma[MAX_TX_DESC-1].next = (unsigned long) lp->txdma_phys; /* phys address of 1st desc */ + + /* Reset transmit indexes (since hardware was reset) */ + lp->tx_head = 0; + lp->tx_tail = 0; + + /* Program address of 1st descriptor in KS8695 */ + ks8695_write(dev, KS8695_WTDLB, (unsigned long) lp->txdma_phys); + + /* Enable the DMA transmitter (will be started on first packet) */ + ctrl = ks8695_read(dev, KS8695_WMDTXC); + ks8695_write(dev, KS8695_WMDTXC, ctrl | WMDTXC_WMTE); +} + +/* + * Stop the DMA transmitter. + */ +static void ks8695eth_stop_tx(struct net_device *dev) +{ + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv; + unsigned long ctrl; + int i; + + /* Disable transmit DMA */ + ctrl = ks8695_read(dev, KS8695_WMDTXC); + ks8695_write(dev, KS8695_WMDTXC, ctrl & ~WMDTXC_WMTE); + + /* Clear any pending skb's still on transmit queue */ + for (i = 0; i < MAX_TX_DESC; i++) { + lp->txdma[i].ownership = 0; + lp->txdma[i].status = 0; + lp->txdma[i].addr = 0; + + if (lp->txSkb[i].skb) { + dma_unmap_single(NULL, lp->txSkb[i].dma, lp->txSkb[i].length, DMA_TO_DEVICE); + dev_kfree_skb_irq(lp->txSkb[i].skb); + lp->txSkb[i].skb = NULL; + } + } +} + +/* + * Reset the MAC hardware. + */ +static void ks8695eth_hw_reset(struct net_device *dev) +{ + /* Perform hardware reset */ + ks8695_write(dev, KS8695_WMDTXC, WMDTXC_WMTRST); + while (ks8695_read(dev, KS8695_WMDTXC) & WMDTXC_WMTRST) { barrier(); } + + /* Initialize the hardware */ + ks8695_write(dev, KS8695_WMDRXC, WMDRXC_WMRU | WMDRXC_WMRB); /* RX: receive Unicast & Broadcast */ + ks8695_write(dev, KS8695_WMDTXC, WMDTXC_WMTEP | WMDTXC_WMTAC); /* TX: add Padding & CRC */ + + // TODO: Can set Rx/Tx PBL: (Micrel using 8) + // TODO: Enable hardware checksumming. + // TODO: Enable Rx/Tx flow-control +} + +/* + * Enable or Disable the IRQs associated with a network interface. + */ +static void ks8695eth_set_irq(struct net_device *dev, short enable) +{ + struct ks8695eth_priv *lp = (struct s8695ether_priv *) dev->priv; + int i; + + for (i = 0; i < NR_IRQS; i++) { + if (lp->irqs & (1 << i)) { + if (enable) + enable_irq(i); + else + disable_irq(i); + } + } +} + +/* + * Open the ethernet interface. + */ +static int ks8695eth_open(struct net_device *dev) +{ + if (!is_valid_ether_addr(dev->dev_addr)) + return -EADDRNOTAVAIL; + + /* MUST reset hardware in _open() */ + ks8695eth_hw_reset(dev); + + /* Update the MAC address (incase user has changed it) */ + update_mac_address(dev); + + /* Start DMA */ + ks8695eth_start_tx(dev); + ks8695eth_start_rx(dev); + + /* Enable interrupts */ + ks8695eth_set_irq(dev, 1); + + netif_start_queue(dev); + return 0; +} + +/* + * Close the ethernet interface. + */ +static int ks8695eth_close(struct net_device *dev) +{ + /* Stop DMA */ + ks8695eth_stop_rx(dev); + ks8695eth_stop_tx(dev); + + /* Disable interrupts */ + ks8695eth_set_irq(dev, 0); + + netif_stop_queue(dev); + return 0; +} + +/* + * Return the current statistics. + */ +static struct net_device_stats *ks8695eth_stats(struct net_device *dev) +{ + struct ks8695eth_priv *adap = (struct ks8695eth_priv *) dev->priv; + + return &adap->stats; +} + +/* + * Queue a packet for transmission in next TX DMA descriptor. + */ +static int ks8695eth_xmit_frame(struct sk_buff *skb, struct net_device *dev) +{ + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv; + int i; + + /* Packets are added to head of array */ + i = lp->tx_head; + + /* Store packet information */ + lp->txSkb[i].skb = skb; + lp->txSkb[i].length = skb->len; + lp->txSkb[i].dma = dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE); + + spin_lock_irq(&lp->tx_lock); + + /* Set Tx descriptor information */ + lp->txdma[i].addr = lp->txSkb[i].dma; + lp->txdma[i].status = TDES_IC | TDES_FS | TDES_LS | (lp->txSkb[i].length & TDES_TBS); + lp->txdma[i].ownership = TDES_OWN; + + /* Start the DMA transmitter (if necessary) */ + ks8695_write(dev, KS8695_WMDTSC, 0); + + lp->tx_head = (lp->tx_head + 1) % MAX_TX_DESC; + if (lp->tx_head == lp->tx_tail) /* no more descriptors */ + netif_stop_queue(dev); + + spin_unlock_irq(&lp->tx_lock); + + dev->trans_start = jiffies; + return 0; +} + +/* ..................................................................... */ + +/* + * The link state of the WAN port has changed. + * (Called from interrupt context) + */ +static void ks8695eth_wan_link(struct net_device *dev) +{ + unsigned long ctrl; + + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC); + if (ctrl & WMC_WLS) { + netif_carrier_on(dev); + printk(KERN_INFO "%s: Link is now %s-%s\n", dev->name, + (ctrl & WMC_WSS) ? "100" : "10", + (ctrl & WMC_WDS) ? "FullDuplex" : "HalfDuplex"); + } + else { + netif_carrier_off(dev); + printk(KERN_INFO "%s: Link down.\n", dev->name); + } +} + +/* ..................................................................... */ + +/* + * A frame has been received. Exteract from buffer descriptor and deliver to + * upper layers. + * (Called from interrupt context) + */ +static void ks8695eth_rx_interrupt(struct net_device *dev) +{ + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv; + struct sk_buff *skb; + unsigned long flags; + unsigned int pktlen; + + while (!(lp->rxdma[lp->rx_idx].status & RDES_OWN)) { + flags = lp->rxdma[lp->rx_idx].status; + + if ((flags & (RDES_FS | RDES_LS)) != (RDES_FS | RDES_LS)) { + printk(KERN_ERR "%s: Spanning packet detected\n", dev->name); + goto rx_complete; + } + + /* handle errors */ + if (flags & (RDES_ES | RDES_RE)) { + lp->stats.rx_errors++; + + if (flags & RDES_TL) /* Frame too long */ + lp->stats.rx_length_errors++; + else if (flags & RDES_RF) /* Runt frame */ + lp->stats.rx_length_errors++; + else if (flags & RDES_CE) /* CRC error */ + lp->stats.rx_crc_errors++; + else if (flags & RDES_RE) /* MII error */ + lp->stats.rx_missed_errors++; + // I hardware checksumming, then check IP/TCP/UDP errors. + + goto rx_complete; + } + + pktlen = flags & RDES_FLEN; + pktlen = pktlen - 4; /* remove CRC */ + + consistent_sync(lp->rxSkb[lp->rx_idx].skb->data, MAX_RXBUF_SIZE, DMA_FROM_DEVICE); + + skb = dev_alloc_skb(pktlen+2); /* +2 to align IP header */ + if (!skb) { + lp->stats.rx_dropped++; + printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name); + goto rx_complete; + } + + skb_reserve(skb, 2); /* align IP header */ + memcpy(skb_put(skb, pktlen), lp->rxSkb[lp->rx_idx].skb->data, pktlen); + + skb->dev = dev; + skb->protocol = eth_type_trans(skb, dev); + netif_rx(skb); + + /* update statistics */ + lp->stats.rx_packets++; + lp->stats.rx_bytes += pktlen; + if (flags & RDES_MF) + lp->stats.multicast++; + dev->last_rx = jiffies; + +rx_complete: + lp->rxdma[lp->rx_idx].status = RDES_OWN; /* reset ownership bit */ + + lp->rx_idx = (lp->rx_idx + 1) % MAX_RX_DESC; /* next descriptor */ + } + + /* restart DMA receiver incase it was suspended */ + ks8695_write(dev, KS8695_WMDRSC, 0); +} + +/* + * A packet has been transmitted. + * (Called from interrupt context) + */ +static void ks8695eth_tx_interrupt(struct net_device *dev) +{ + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv; + int i; + + /* Packets are removed from tail of array */ + i = lp->tx_tail; + + // Loop through multiple times? + + if (lp->txSkb[i].skb) { + /* update statistics */ + lp->stats.tx_packets++; + lp->stats.tx_bytes += lp->txSkb[i].length; + + /* free packet */ + dma_unmap_single(NULL, lp->txSkb[i].dma, lp->txSkb[i].length, DMA_TO_DEVICE); + dev_kfree_skb_irq(lp->txSkb[i].skb); + lp->txSkb[i].skb = NULL; + + /* Not necessary to clear descriptor since we still own it */ + } + + lp->tx_tail = (lp->tx_tail + 1) % MAX_TX_DESC; + + netif_wake_queue(dev); +} + +/* + * MAC interrupt handler + */ +static irqreturn_t ks8695eth_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + struct net_device *dev = (struct net_device *) dev_id; + + switch (irq) { + case KS8695_IRQ_LAN_RX_STATUS: + case KS8695_IRQ_HPNA_RX_STATUS: + case KS8695_IRQ_WAN_RX_STATUS: + ks8695eth_rx_interrupt(dev); + return IRQ_HANDLED; + + case KS8695_IRQ_LAN_TX_STATUS: + case KS8695_IRQ_HPNA_TX_STATUS: + case KS8695_IRQ_WAN_TX_STATUS: + ks8695eth_tx_interrupt(dev); + return IRQ_HANDLED; + + case KS8695_IRQ_WAN_LINK: + ks8695eth_wan_link(dev); + return IRQ_HANDLED; + + default: + return IRQ_NONE; + } +} + + +/* ..................................................................... */ + +/* + * Initialize the WAN hardware to known defaults. + */ +static int __init ks8695eth_init_wan(void) +{ + unsigned long ctrl; + + /* Support auto-negotiation */ + ctrl = WMC_WANAP | WMC_WANA100F | WMC_WANA100H | WMC_WANA10F | WMC_WANA10H; + + /* LED0 = Speed LED1 = Link/Activity */ + ctrl |= (WLED0S_SPEED | WLED1S_LINK_ACTIVITY); + + /* Restart Auto-negotiation */ + ctrl |= WMC_WANR; + + __raw_writel(ctrl, KS8695_MISC_VA + KS8695_WMC); + + __raw_writel(0, KS8695_MISC_VA + KS8695_WPPM); + __raw_writel(0, KS8695_MISC_VA + KS8695_PPS); +} + +/* + * Initialize the LAN Switch hardware to known defaults. + */ +static int __init ks8695eth_init_switch(void) +{ + unsigned long ctrl; + + ctrl = 0x40819e00; /* default */ + + /* LED0 = Speed LED1 = Link/Activity */ + ctrl &= ~(SEC0_LLED1S | SEC0_LLED0S); + ctrl |= (LLED0S_SPEED | LLED1S_LINK_ACTIVITY); + + /* Enable Switch */ + ctrl |= SEC0_ENABLE; + + __raw_writel(ctrl, KS8695_SWITCH_VA + KS8695_SEC0); + + __raw_writel(0x9400100, KS8695_SWITCH_VA + KS8695_SEC1); /* reset defaults */ +} + +static int ks8695eth_hook_irqs(struct platform_device *pdev, struct net_device *dev, unsigned long *irqset) +{ + struct resource *res; + int i = 0, ret; + + while ((res = platform_get_resource(pdev, IORESOURCE_IRQ, i))) { + set_irq_flags(res->start, IRQF_VALID | IRQF_NOAUTOEN); + + ret = request_irq(res->start, ks8695eth_interrupt, SA_INTERRUPT | SA_SHIRQ, res->name, dev); + if (ret) { + printk(KERN_ERR "%s: return_irq %ld failed\n", dev->name, res->start); + return -EBUSY; + } + + *irqset |= (1 << res->start); + + // TODO: Can set different priorities for interrupts [0x BB AA FF]. + + i++; + } + + return 0; +} + +static int __init ks8695eth_probe(struct platform_device *pdev) +{ + struct net_device *dev; + struct ks8695eth_priv *lp; + struct resource *res; + int i = 0, ret, size; + + /* Create ethernet device */ + dev = alloc_etherdev(sizeof(struct ks8695eth_priv)); + if (!dev) + return -ENOMEM; + + /* Get I/O base address */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + free_netdev(dev); + return -ENODEV; + } + dev->base_addr = res->start; + + SET_MODULE_OWNER(dev); + lp = (struct ks8695eth_priv *) dev->priv; + + /* Retreive MAC address before the MAC registers are reset */ + get_mac_address(dev); + + /* Reset the hardware */ + ks8695_write(dev, KS8695_WMDTXC, WMDTXC_WMTRST); + while (ks8695_read(dev, KS8695_WMDTXC) & WMDTXC_WMTRST) { barrier(); } + + /* Get IRQ's */ + dev->irq = platform_get_irq(pdev, 0); + ret = ks8695eth_hook_irqs(pdev, dev, &lp->irqs); + if (ret) { + // Cleanup. + } + + /* Allocate DMA-able memory for Tx descriptor */ + size = sizeof(struct tx_descriptor) * MAX_TX_DESC; + lp->txdma = dma_alloc_coherent(NULL, size, &lp->txdma_phys, GFP_KERNEL); + if (lp->txdma == NULL) { + // free IRQs + free_netdev(dev); + return -ENOMEM; + } + memset(lp->txdma, 0, size); + lp->tx_head = 0; + lp->tx_tail = 0; + + /* Allocate DMA-able memory for Rx descriptor */ + size = sizeof(struct rx_descriptor) * MAX_RX_DESC; + lp->rxdma = dma_alloc_coherent(NULL, size, &lp->rxdma_phys, GFP_KERNEL); + if (lp->rxdma == NULL) { + // free IRQs + // Free TX descriptor memory. + free_netdev(dev); + return -ENOMEM; + } + memset(lp->rxdma, 0, size); + lp->rx_idx = 0; + + /* Allocate DMA-able memory for Rx Data */ + for (i = 0; i < MAX_RX_DESC; i++) { + lp->rxSkb[i].skb = alloc_skb(MAX_RXBUF_SIZE, GFP_KERNEL); + if (lp->rxSkb[i].skb == NULL) { + // Cleanup + return -ENOMEM; + } + lp->rxSkb[i].length = MAX_RXBUF_SIZE; + lp->rxSkb[i].dma = dma_map_single(NULL, lp->rxSkb[i].skb->data, MAX_RXBUF_SIZE, DMA_TO_DEVICE); + } + + platform_set_drvdata(pdev, dev); + + ether_setup(dev); + dev->open = ks8695eth_open; + dev->stop = ks8695eth_close; + dev->hard_start_xmit = ks8695eth_xmit_frame; + dev->get_stats = ks8695eth_stats; + dev->set_multicast_list = ks8695eth_set_multi; + dev->set_mac_address = ks8695eth_set_mac; + dev->ethtool_ops = &ks8695eth_ethtool_ops; + + SET_NETDEV_DEV(dev, &pdev->dev); + + if (dev->base_addr == KS8695_WAN_VA) + ks8695eth_init_wan(); + else if (dev->base_addr == KS8695_LAN_VA) + ks8695eth_init_switch(); + + /* Register the network interface */ + ret = register_netdev(dev); + if (ret) { + // free IRQs + free_netdev(dev); +// dma_free_coherent(NULL, sizeof(struct ks8695_tx_dma), lp->txdma, lp->txdma_phys); +// dma_free_coherent(NULL, sizeof(struct ks8695_rx_dma), lp->rxdma, lp->rxdma_phys); + return ret; + } + + printk(KERN_INFO "%s: KS8695 ethernet (%02x:%02x:%02x:%02x:%02x:%02x)\n", dev->name, + dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], + dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); + + return 0; +} + +static int __devexit ks8695eth_remove(struct platform_device *pdev) +{ + struct net_device *dev = platform_get_drvdata(pdev); + struct ks8695eth_priv *lp = (struct s8695ether_priv *) dev->priv; + + unregister_netdev(dev); + + // Free IRQ +// dma_free_coherent(NULL, sizeof(struct ks8695_tx_dma), lp->txdma, lp->txdma_phys); +// dma_free_coherent(NULL, sizeof(struct ks8695_rx_dma), lp->rxdma, lp->rxdma_phys); + + platform_set_drvdata(pdev, NULL); + free_netdev(dev); + return 0; +} + +static struct platform_driver ks8695ether_driver = { + .probe = ks8695eth_probe, + .remove = __devexit_p(ks8695eth_remove), +// .suspend = +// .resume = + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, + }, +}; + + +static int __init ks8695eth_init(void) +{ + return platform_driver_register(&ks8695ether_driver); +} + +static void __exit ks8695eth_exit(void) +{ + platform_driver_unregister(&ks8695ether_driver); +} + +module_init(ks8695eth_init); +module_exit(ks8695eth_exit); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("KS8695 Ethernet driver"); +MODULE_AUTHOR("Andrew Victor"); diff -urN -x CVS linux-2.6.17-san/drivers/net/arm/ks8695_ether.h linux-2.6.17-rc/drivers/net/arm/ks8695_ether.h --- linux-2.6.17-san/drivers/net/arm/ks8695_ether.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/drivers/net/arm/ks8695_ether.h Wed Jun 14 12:11:13 2006 @@ -0,0 +1,92 @@ +/* + * Ethernet driver for the Micrel/Kendin KS8695 (Centaur) + * + * (C) 2006 Andrew Victor + * + */ + +#ifndef KS8695_ETHERNET +#define KS8695_ETHERNET + +/* .... Hardware Descriptors ................................................ */ + +struct rx_descriptor { + unsigned long status; + unsigned long length; + unsigned long addr; + unsigned long next; +}; + +#define RDES_OWN (1 << 31) /* Ownership */ +#define RDES_FS (1 << 30) /* First Descriptor */ +#define RDES_LS (1 << 29) /* Last Descriptor */ +#define RDES_IPE (1 << 28) /* IP Checksum error */ +#define RDES_TCPE (1 << 27) /* TCP Checksum error */ +#define RDES_UDPE (1 << 26) /* UDP Checksum error */ +#define RDES_ES (1 << 25) /* Error summary */ +#define RDES_MF (1 << 24) /* Multicast Frame */ +#define RDES_RE (1 << 19) /* MII Error reported */ +#define RDES_TL (1 << 18) /* Frame too Long */ +#define RDES_RF (1 << 17) /* Runt Frame */ +#define RDES_CE (1 << 16) /* CRC error */ +#define RDES_FT (1 << 15) /* Frame Type */ +#define RDES_FLEN (0x7ff) /* Frame Length */ + +#define RDES_RER (1 << 25) /* Receive End of Ring */ +#define RDES_RBS (0x7ff) /* Receive Buffer Size */ + + +struct tx_descriptor { + unsigned long ownership; + unsigned long status; + unsigned long addr; + unsigned long next; +}; + +#define TDES_OWN (1 << 31) /* Ownership */ + +#define TDES_IC (1 << 31) /* Interrupt on Completion */ +#define TDES_FS (1 << 30) /* First Segment */ +#define TDES_LS (1 << 29) /* Last Segment */ +#define TDES_IPCKG (1 << 28) /* IP Checksum generate */ +#define TDES_TCPCKG (1 << 27) /* TCP Checksum generate */ +#define TDES_UDPCKG (1 << 26) /* UDP Checksum generate */ +#define TDES_TER (1 << 25) /* Transmit End of Ring */ +#define TDES_TBS (0x7ff) /* Transmit Buffer Size */ + + +/* .... ..................................................................... */ + +#define MAX_RX_DESC 16 /* number of receive descriptors */ +#define MAX_TX_DESC 8 /* number of transmit descriptors */ +#define MAX_RXBUF_SIZE 0x600 /* 1518 rounded-up */ + +struct ks8695_buffer +{ + struct sk_buff *skb; + dma_addr_t dma; + unsigned long length; +}; + + +struct ks8695eth_priv +{ + struct net_device_stats stats; /* statistics */ + unsigned long irqs; /* IRQ bitset */ + + /* Transmit */ + struct tx_descriptor *txdma; /* Tx DMA descriptors */ + dma_addr_t txdma_phys; /* TX DMA descriptors (phys address) */ + unsigned int tx_head; /* descriptor index (add) */ + unsigned int tx_tail; /* descriptor index (remove) */ + spinlock_t tx_lock; + struct ks8695_buffer txSkb[MAX_TX_DESC]; /* packets being transmitted */ + + /* Receive */ + struct rx_descriptor *rxdma; /* Rx DMA descriptors */ + dma_addr_t rxdma_phys; /* Rx DMA descriptors (phys address) */ + unsigned int rx_idx; /* descriptor index */ + struct ks8695_buffer rxSkb[MAX_RX_DESC]; +}; + +#endif diff -urN -x CVS linux-2.6.17-san/drivers/serial/Kconfig linux-2.6.17-rc/drivers/serial/Kconfig --- linux-2.6.17-san/drivers/serial/Kconfig Wed Jun 21 14:02:43 2006 +++ linux-2.6.17-rc/drivers/serial/Kconfig Fri Jun 2 14:46:41 2006 @@ -334,6 +334,22 @@ Say Y if you have an external 8250/16C550 UART. If unsure, say N. +config SERIAL_KS8695 + bool "Micrel KS8695 (Centaur) serial port support" + depends on ARCH_KS8695 + select SERIAL_CORE + help + This selects the Micrel Centaur KS8695 UART. Say Y here. + +config SERIAL_KS8695_CONSOLE + bool "Support for console on KS8695 (Centaur) serial port" + depends on SERIAL_KS8695=y + select SERIAL_CORE_CONSOLE + help + Say Y here if you wish to use a KS8695 (Centaur) UART as the system + console (the system console is the device which receives all kernel + messages and warnings and which allows logins in single user mode). + config SERIAL_CLPS711X tristate "CLPS711X serial port support" depends on ARM && ARCH_CLPS711X diff -urN -x CVS linux-2.6.17-san/drivers/serial/Makefile linux-2.6.17-rc/drivers/serial/Makefile --- linux-2.6.17-san/drivers/serial/Makefile Wed Jun 21 13:57:04 2006 +++ linux-2.6.17-rc/drivers/serial/Makefile Tue May 16 16:45:44 2006 @@ -55,3 +55,4 @@ obj-$(CONFIG_SERIAL_SGI_IOC4) += ioc4_serial.o obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o obj-$(CONFIG_SERIAL_AT91) += at91_serial.o +obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o diff -urN -x CVS linux-2.6.17-san/drivers/serial/serial_ks8695.c linux-2.6.17-rc/drivers/serial/serial_ks8695.c --- linux-2.6.17-san/drivers/serial/serial_ks8695.c Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/drivers/serial/serial_ks8695.c Fri Jun 16 12:43:51 2006 @@ -0,0 +1,705 @@ +/* + * drivers/serial/serial_ks8695.c + * + * Driver for KS8695 serial ports + * + * Based on drivers/serial/serial_amba.c, by Kam Lee. + * + * Copyright 2002-2005 Micrel Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This is a generic driver for ARM AMBA-type serial ports. This is + * based on 16550. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#if defined(CONFIG_SERIAL_KS8695_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) +#define SUPPORT_SYSRQ +#endif + +#include + + +#define SERIAL_KS8695_MAJOR 204 +#define SERIAL_KS8695_MINOR 16 +#define SERIAL_KS8695_DEVNAME "ttyAM" + +#define SERIAL_KS8695_NR 1 + +/* + * Access macros for the KS8695 UART + */ +#define UART_CLR_INT_STATUS(c) __raw_writel((c), KS8695_IRQ_VA + KS8695_INTST) +#define UART_GET_IER() __raw_readl(KS8695_IRQ_VA + KS8695_INTEN) +#define UART_PUT_IER(c) __raw_writel((c), KS8695_IRQ_VA + KS8695_INTEN) + +#define UART_GET_CHAR(p) (__raw_readl((p)->membase + KS8695_URRB) & 0xFF) +#define UART_PUT_CHAR(p, c) __raw_writel((c), (p)->membase + KS8695_URTH) +#define UART_GET_FCR(p) __raw_readl((p)->membase + KS8695_URFC) +#define UART_PUT_FCR(p, c) __raw_writel((c), (p)->membase + KS8695_URFC) +#define UART_GET_MSR(p) __raw_readl((p)->membase + KS8695_URMS) +#define UART_GET_LSR(p) __raw_readl((p)->membase + KS8695_URLS) +#define UART_GET_LCR(p) __raw_readl((p)->membase + KS8695_URLC) +#define UART_PUT_LCR(p, c) __raw_writel((c), (p)->membase + KS8695_URLC) +#define UART_GET_MCR(p) __raw_readl((p)->membase + KS8695_URMC) +#define UART_PUT_MCR(p, c) __raw_writel((c), (p)->membase + KS8695_URMC) +#define UART_GET_BRDR(p) __raw_readl((p)->membase + KS8695_URBD) +#define UART_PUT_BRDR(p, c) __raw_writel((c), (p)->membase + KS8695_URBD) + +#define UART_DUMMY_LSR_RX 0x100 +#define UART_PORT_SIZE (KS8695_USR - KS8695_URRB + 4) + +#define KS8695_UART_INTERRUPTS ( \ + (1 << KS8695_IRQ_UART_TX) | \ + (1 << KS8695_IRQ_UART_RX) | \ + (1 << KS8695_IRQ_UART_LINE_STATUS) | \ + (1 << KS8695_IRQ_UART_MODEM_STATUS) ) + + +#ifdef SUPPORT_SYSRQ +static struct console ks8695_console; +#endif + +static void ks8695uart_stop_tx(struct uart_port *port) +{ + unsigned int ier; + + ier = UART_GET_IER(); + UART_PUT_IER(ier & ~(1 << KS8695_IRQ_UART_TX)); + +// Rather use: disable_irq(KS8695_IRQ_UART_TX); +} + +static void ks8695uart_start_tx(struct uart_port *port) +{ + unsigned int ier; + + ier = UART_GET_IER(); + UART_PUT_IER(ier | (1 << KS8695_IRQ_UART_TX)); + +// Rather use: enable_irq(KS8695_IRQ_UART_TX); +} + +static void ks8695uart_stop_rx(struct uart_port *port) +{ + unsigned int ier; + + ier = UART_GET_IER(); + UART_PUT_IER(ier & ~(1 << KS8695_IRQ_UART_RX)); + +// Rather use: disable_irq(KS8695_IRQ_UART_RX); +} + +static void ks8695uart_enable_ms(struct uart_port *port) +{ + UART_PUT_IER(UART_GET_IER() | (1 << KS8695_IRQ_UART_MODEM_STATUS)); + +// Rather use: enable_irq(KS8695_IRQ_UART_MODEM_STATUS); +} + +static irqreturn_t ks8695uart_rx_chars(int irq, void *dev_id, struct pt_regs *regs) +{ + struct uart_port *port = dev_id; + struct tty_struct *tty = port->info->tty; + unsigned int status, ch, lsr, flg, max_count = 256; + + status = UART_GET_LSR(port); /* clears pending LSR interrupts */ + while ((status & URLS_URDR) && max_count--) { + ch = UART_GET_CHAR(port); + flg = TTY_NORMAL; + + port->icount.rx++; + + /* + * Note that the error handling code is + * out of the main execution path + */ + lsr = UART_GET_LSR(port) | UART_DUMMY_LSR_RX; + if (unlikely(lsr & (URLS_URBI | URLS_URPE | URLS_URFE | URLS_URROE))) { + if (lsr & URLS_URBI) { + lsr &= ~(URLS_URFE | URLS_URPE); + port->icount.brk++; + if (uart_handle_break(port)) + goto ignore_char; + } + if (lsr & URLS_URPE) + port->icount.parity++; + if (lsr & URLS_URFE) + port->icount.frame++; + if (lsr & URLS_URROE) + port->icount.overrun++; + + lsr &= port->read_status_mask; + + if (lsr & URLS_URBI) + flg = TTY_BREAK; + else if (lsr & URLS_URPE) + flg = TTY_PARITY; + else if (lsr & URLS_URFE) + flg = TTY_FRAME; + } + + if (uart_handle_sysrq_char(port, ch, regs)) + goto ignore_char; + + uart_insert_char(port, lsr, URLS_URROE, ch, flg); + +ignore_char: + status = UART_GET_LSR(port); + } + tty_flip_buffer_push(tty); + + return IRQ_HANDLED; +} + + +static irqreturn_t ks8695uart_tx_chars(int irq, void *dev_id, struct pt_regs *regs) +{ + struct uart_port *port = dev_id; + struct circ_buf *xmit = &port->info->xmit; + unsigned int count; + + if (port->x_char) { + UART_CLR_INT_STATUS(1 << KS8695_IRQ_UART_TX); + UART_PUT_CHAR(port, port->x_char); + port->icount.tx++; + port->x_char = 0; + return IRQ_HANDLED; + } + + if (uart_tx_stopped(port) || uart_circ_empty(xmit)) { + ks8695uart_stop_tx(port); + return IRQ_HANDLED; + } + + count = 16; + while (!uart_circ_empty(xmit) && (count-- > 0)) { + UART_CLR_INT_STATUS(1 << KS8695_IRQ_UART_TX); + UART_PUT_CHAR(port, xmit->buf[xmit->tail]); + + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); + port->icount.tx++; + } + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(port); + + if (uart_circ_empty(xmit)) + ks8695uart_stop_tx(port); + + return IRQ_HANDLED; +} + +static irqreturn_t ks8695uart_modem_status(int irq, void *dev_id, struct pt_regs *regs) +{ + struct uart_port *port = dev_id; + unsigned int status; + + /* + * clear modem interrupt by reading MSR + */ + status = UART_GET_MSR(port); + + if (status & URMS_URDDCD) + uart_handle_dcd_change(port, status & URMS_URDDCD); + + if (status & URMS_URDDST) + port->icount.dsr++; + + if (status & URMS_URDCTS) + uart_handle_cts_change(port, status & URMS_URDCTS); + + if (status & URMS_URTERI) + port->icount.rng++; + + wake_up_interruptible(&port->info->delta_msr_wait); + + return IRQ_HANDLED; +} + +static unsigned int ks8695uart_tx_empty(struct uart_port *port) +{ + return (UART_GET_LSR(port) & URLS_URTE) ? TIOCSER_TEMT : 0; +} + +static unsigned int ks8695uart_get_mctrl(struct uart_port *port) +{ + unsigned int result = 0; + unsigned int status; + + status = UART_GET_MSR(port); + if (status & URMS_URDCD) + result |= TIOCM_CAR; + if (status & URMS_URDSR) + result |= TIOCM_DSR; + if (status & URMS_URCTS) + result |= TIOCM_CTS; + if (status & URMS_URRI) + result |= TIOCM_RI; + + return result; +} + +static void ks8695uart_set_mctrl(struct uart_port *port, u_int mctrl) +{ + unsigned int mcr; + + mcr = UART_GET_MCR(port); + if (mctrl & TIOCM_RTS) + mcr |= URMC_URRTS; + else + mcr &= ~URMC_URRTS; + + if (mctrl & TIOCM_DTR) + mcr |= URMC_URDTR; + else + mcr &= ~URMC_URDTR; + + UART_PUT_MCR(port, mcr); +} + +static void ks8695uart_break_ctl(struct uart_port *port, int break_state) +{ + unsigned int lcr; + + lcr = UART_GET_LCR(port); + + if (break_state == -1) + lcr |= URLC_URSBC; + else + lcr &= ~URLC_URSBC; + + UART_PUT_LCR(port, lcr); +} + +static int ks8695uart_startup(struct uart_port *port) +{ + int retval; + + /* Make sure interrupts are disabled */ + UART_PUT_IER(UART_GET_IER() & ~KS8695_UART_INTERRUPTS); + + /* + * Allocate the IRQ + */ + + retval = request_irq(KS8695_IRQ_UART_TX, ks8695uart_tx_chars, SA_INTERRUPT, "UART TX", port); + if (retval) + return retval; + + retval = request_irq(KS8695_IRQ_UART_RX, ks8695uart_rx_chars, SA_INTERRUPT, "UART RX", port); + if (retval) + return retval; + + retval = request_irq(KS8695_IRQ_UART_LINE_STATUS, ks8695uart_rx_chars, SA_INTERRUPT, "UART LineStatus", port); + if (retval) + return retval; + + retval = request_irq(KS8695_IRQ_UART_MODEM_STATUS, ks8695uart_modem_status, SA_INTERRUPT, "UART ModemStatus", port); + if (retval) + return retval; + + /* + * Finally, enable all UART interrupts except TX. + */ + UART_PUT_IER((UART_GET_IER() | KS8695_UART_INTERRUPTS) & ~(1 << KS8695_IRQ_UART_TX)); + + return 0; +} + +static void ks8695uart_shutdown(struct uart_port *port) +{ + /* + * disable all interrupts. + */ + UART_PUT_IER(UART_GET_IER() & ~KS8695_UART_INTERRUPTS); +#warning "Use disable_irq()" + + /* + * Free the interrupt + */ + free_irq(KS8695_IRQ_UART_RX, port); + free_irq(KS8695_IRQ_UART_TX, port); + free_irq(KS8695_IRQ_UART_MODEM_STATUS, port); + free_irq(KS8695_IRQ_UART_LINE_STATUS, port); + + /* disable break condition and fifos */ + UART_PUT_LCR(port, UART_GET_LCR(port) & ~URLC_URSBC); + UART_PUT_FCR(port, UART_GET_FCR(port) & ~URFC_URFE); +} + +static void ks8695uart_set_termios(struct uart_port *port, struct termios *termios, struct termios *old) +{ + unsigned int lcr, old_ier, fcr=0; + unsigned long flags; + unsigned int baud, quot; + + /* + * Ask the core to calculate the divisor for us. + */ + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); + quot = uart_get_divisor(port, baud); + + switch (termios->c_cflag & CSIZE) { + case CS5: + lcr = URCL_5; + break; + case CS6: + lcr = URCL_6; + break; + case CS7: + lcr = URCL_7; + break; + default: + lcr = URCL_8; + break; + } + + /* stop bits */ + if (termios->c_cflag & CSTOPB) + lcr |= URLC_URSB; + + /* parity */ + if (termios->c_cflag & PARENB) { + if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */ + if (termios->c_cflag & PARODD) + lcr |= URPE_MARK; + else + lcr |= URPE_SPACE; + } + else if (termios->c_cflag & PARODD) + lcr |= URPE_ODD; + else + lcr |= URPE_EVEN; + } + + if (port->fifosize > 1) + fcr = URFC_URFRT_8 | URFC_URTFR | URFC_URRFR | URFC_URFE; + + spin_lock_irqsave(&port->lock, flags); + + /* + * Update the per-port timeout. + */ + uart_update_timeout(port, termios->c_cflag, baud); + + port->read_status_mask = URLS_URROE; + if (termios->c_iflag & INPCK) + port->read_status_mask |= (URLS_URFE | URLS_URPE); + if (termios->c_iflag & (BRKINT | PARMRK)) + port->read_status_mask |= URLS_URBI; + + /* + * Characters to ignore + */ + port->ignore_status_mask = 0; + if (termios->c_iflag & IGNPAR) + port->ignore_status_mask |= (URLS_URFE | URLS_URPE); + if (termios->c_iflag & IGNBRK) { + port->ignore_status_mask |= URLS_URBI; + /* + * If we're ignoring parity and break indicators, + * ignore overruns too (for real raw support). + */ + if (termios->c_iflag & IGNPAR) + port->ignore_status_mask |= URLS_URROE; + } + + /* + * Ignore all characters if CREAD is not set. + */ + if ((termios->c_cflag & CREAD) == 0) + port->ignore_status_mask |= UART_DUMMY_LSR_RX; + + /* first, disable everything */ + old_ier = UART_GET_IER(); + UART_PUT_IER(old_ier & ~KS8695_UART_INTERRUPTS); + + if (UART_ENABLE_MS(port, termios->c_cflag)) + old_ier |= (1 << KS8695_IRQ_UART_MODEM_STATUS); + else + old_ier &= ~(1 << KS8695_IRQ_UART_MODEM_STATUS); + + /* Set baud rate */ + UART_PUT_BRDR(port, quot); + + UART_PUT_LCR(port, lcr); + UART_PUT_FCR(port, fcr); + UART_PUT_IER(old_ier & ~(1 << KS8695_IRQ_UART_TX)); + + spin_unlock_irqrestore(&port->lock, flags); +} + +static const char *ks8695uart_type(struct uart_port *port) +{ + return port->type == PORT_KS8695 ? "KS8695" : NULL; +} + +/* + * Release the memory region(s) being used by 'port' + */ +static void ks8695uart_release_port(struct uart_port *port) +{ + release_mem_region(port->mapbase, UART_PORT_SIZE); +} + +/* + * Request the memory region(s) being used by 'port' + */ +static int ks8695uart_request_port(struct uart_port *port) +{ + return request_mem_region(port->mapbase, UART_PORT_SIZE, "serial_ks8695") + != NULL ? 0 : -EBUSY; +} + +/* + * Configure/autoconfigure the port. + */ +static void ks8695uart_config_port(struct uart_port *port, int flags) +{ + if (flags & UART_CONFIG_TYPE) { + port->type = PORT_KS8695; + ks8695uart_request_port(port); + } +} + +/* + * verify the new serial_struct (for TIOCSSERIAL). + */ +static int ks8695uart_verify_port(struct uart_port *port, struct serial_struct *ser) +{ + int ret = 0; + + if (ser->type != PORT_UNKNOWN && ser->type != PORT_KS8695) + ret = -EINVAL; + if (ser->irq != port->irq) + ret = -EINVAL; + if (ser->baud_base < 9600) + ret = -EINVAL; + return ret; +} + +static struct uart_ops ks8695uart_pops = { + .tx_empty = ks8695uart_tx_empty, + .set_mctrl = ks8695uart_set_mctrl, + .get_mctrl = ks8695uart_get_mctrl, + .stop_tx = ks8695uart_stop_tx, + .start_tx = ks8695uart_start_tx, + .stop_rx = ks8695uart_stop_rx, + .enable_ms = ks8695uart_enable_ms, + .break_ctl = ks8695uart_break_ctl, + .startup = ks8695uart_startup, + .shutdown = ks8695uart_shutdown, + .set_termios = ks8695uart_set_termios, + .type = ks8695uart_type, + .release_port = ks8695uart_release_port, + .request_port = ks8695uart_request_port, + .config_port = ks8695uart_config_port, + .verify_port = ks8695uart_verify_port, +}; + +static struct uart_port ks8695uart_ports[SERIAL_KS8695_NR] = { + { + .membase = (void *) KS8695_UART_VA, + .mapbase = KS8695_UART_VA, + .iotype = SERIAL_IO_MEM, + .irq = KS8695_IRQ_UART_TX, + .uartclk = CLOCK_TICK_RATE * 16, + .fifosize = 16, + .ops = &ks8695uart_pops, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + } +}; + +#ifdef CONFIG_SERIAL_KS8695_CONSOLE +static void ks8695_console_putchar(struct uart_port *port, int ch) +{ + while (!(UART_GET_LSR(port) & URLS_URTHRE)) + barrier(); + + UART_PUT_CHAR(port, ch); +} + +static void ks8695_console_write(struct console *co, const char *s, u_int count) +{ + struct uart_port *port = ks8695uart_ports + co->index; + unsigned int old_ier; + + /* + * Wait for any pending characters to be sent first and then + * disable the interrupts; add count in case the interrupt is + * locking the system. + */ + while (!(UART_GET_LSR(port) & URLS_URTE)) + barrier(); + + old_ier = UART_GET_IER(); + UART_PUT_IER(old_ier & ~KS8695_UART_INTERRUPTS); + + uart_console_write(port, s, count, ks8695_console_putchar); + + /* + * Finally, wait for transmitter to become empty + * and restore the interrupts. + */ + while (!(UART_GET_LSR(port) & URLS_URTE)) + barrier(); + + UART_PUT_IER(old_ier); +} + +static void __init ks8695_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits) +{ + unsigned int lcr; + + lcr = UART_GET_LCR(port); + + switch (lcr & URLC_PARITY) { + case URPE_ODD: + *parity = 'o'; + break; + case URPE_EVEN: + *parity = 'e'; + break; + default: + *parity = 'n'; + } + + switch (lcr & URLC_URCL) { + case URCL_5: + *bits = 5; + break; + case URCL_6: + *bits = 6; + break; + case URCL_7: + *bits = 7; + break; + default: + *bits = 8; + } + + *baud = port->uartclk / (UART_GET_BRDR(port) & 0x0FFF); + *baud /= 16; + *baud &= 0xFFFFFFF0; +} + +static int __init ks8695_console_setup(struct console *co, char *options) +{ + struct uart_port *port; + int baud = 115200; + int bits = 8; + int parity = 'n'; + int flow = 'n'; + + /* + * Check whether an invalid uart number has been specified, and + * if so, search for the first available port that does have + * console support. + */ + port = uart_get_console(ks8695uart_ports, SERIAL_KS8695_NR, co); + + if (options) + uart_parse_options(options, &baud, &parity, &bits, &flow); + else + ks8695_console_get_options(port, &baud, &parity, &bits); + + return uart_set_options(port, co, baud, parity, bits, flow); +} + +extern struct uart_driver ks8695_reg; + +static struct console ks8695_console = { + .name = SERIAL_KS8695_DEVNAME, + .write = ks8695_console_write, + .device = uart_console_device, + .setup = ks8695_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, + .data = &ks8695_reg, +}; + +static int __init ks8695_console_init(void) +{ + register_console(&ks8695_console); + return 0; +} + +console_initcall(ks8695_console_init); + +#define KS8695_CONSOLE &ks8695_console +#else +#define KS8695_CONSOLE NULL +#endif + +static struct uart_driver ks8695_reg = { + .owner = THIS_MODULE, + .driver_name = "serial_ks8695", + .dev_name = SERIAL_KS8695_DEVNAME, + .devfs_name = SERIAL_KS8695_DEVNAME, + .major = SERIAL_KS8695_MAJOR, + .minor = SERIAL_KS8695_MINOR, + .nr = SERIAL_KS8695_NR, + .cons = KS8695_CONSOLE, +}; + +static int __init ks8695uart_init(void) +{ + int i, ret; + + printk(KERN_INFO "Serial: Micrel KS8695 UART driver version: 2.6.1.0\n"); + + ret = uart_register_driver(&ks8695_reg); + if (ret) + return ret; + + for (i = 0; i < SERIAL_KS8695_NR; i++) + uart_add_one_port(&ks8695_reg, &ks8695uart_ports[0]); + + return 0; +} + +static void __exit ks8695uart_exit(void) +{ + int i; + + for (i = 0; i < SERIAL_KS8695_NR; i++) + uart_remove_one_port(&ks8695_reg, &ks8695uart_ports[0]); + uart_unregister_driver(&ks8695_reg); +} + +module_init(ks8695uart_init); +module_exit(ks8695uart_exit); + +MODULE_DESCRIPTION("KS8695 serial port driver"); +MODULE_AUTHOR("Micrel Inc."); +MODULE_LICENSE("GPL"); diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/debug-macro.S linux-2.6.17-rc/include/asm-arm/arch-ks8695/debug-macro.S --- linux-2.6.17-san/include/asm-arm/arch-ks8695/debug-macro.S Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/debug-macro.S Wed Jun 14 12:15:57 2006 @@ -0,0 +1,39 @@ +/* + * include/asm-arm/arch-ks8695/debug-macro.S + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - Debug macros + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + + .macro addruart, rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + ldreq \rx, =KS8695_UART_PA @ physical base address + ldrne \rx, =KS8695_UART_VA @ virtual base address + .endm + + .macro senduart, rd, rx + str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register + .endm + + .macro busyuart, rd, rx +1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register + tst \rd, #URLS_URTE @ Holding & Shift registers empty? + beq 1001b + .endm + + .macro waituart, rd, rx +1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register + tst \rd, #URLS_URTHRE @ Holding Register empty? + beq 1001b + .endm diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/devices.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/devices.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/devices.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/devices.h Mon Jun 5 18:17:28 2006 @@ -0,0 +1,20 @@ +/* + * include/asm-arm/arch-ks8695/devices.h + * + * Copyright (C) 2006 Andrew Victor + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_DEVICES_H +#define __ASM_ARCH_DEVICES_H + + /* Ethernet */ +extern void __init ks8695_add_device_wan(void); +extern void __init ks8695_add_device_lan(void); +extern void __init ks8695_add_device_hpna(void); + +#endif + diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/dma.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/dma.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/dma.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/dma.h Tue May 16 16:45:44 2006 @@ -0,0 +1,17 @@ +/* + * include/asm-arm/arch-ks8695/dma.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/entry-macro.S linux-2.6.17-rc/include/asm-arm/arch-ks8695/entry-macro.S --- linux-2.6.17-san/include/asm-arm/arch-ks8695/entry-macro.S Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/entry-macro.S Wed Jun 14 12:16:16 2006 @@ -0,0 +1,49 @@ +/* + * include/asm-arm/arch-ks8695/entry-macro.S + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * Low-level IRQ helper macros for KS8695 + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. +*/ + +#include +#include + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \base, =KS8695_IRQ_VA + ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register + + teq \irqstat, #0 + beq 1001f + + mov \irqnr, #0 + + tst \irqstat, #0xff + moveq \irqstat, \irqstat, lsr #8 + addeq \irqnr, \irqnr, #8 + tsteq \irqstat, #0xff + moveq \irqstat, \irqstat, lsr #8 + addeq \irqnr, \irqnr, #8 + tsteq \irqstat, #0xff + moveq \irqstat, \irqstat, lsr #8 + addeq \irqnr, \irqnr, #8 + tst \irqstat, #0x0f + moveq \irqstat, \irqstat, lsr #4 + addeq \irqnr, \irqnr, #4 + tst \irqstat, #0x03 + moveq \irqstat, \irqstat, lsr #2 + addeq \irqnr, \irqnr, #2 + tst \irqstat, #0x01 + addeqs \irqnr, \irqnr, #1 +1001: + .endm + + /* currently don't need an disable_fiq macro */ + .macro disable_fiq + .endm diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/gpio.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/gpio.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/gpio.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/gpio.h Fri Jun 16 13:12:44 2006 @@ -0,0 +1,41 @@ +/* + * include/asm-arm/arch-ks8695/gpio.h + * + * Copyright (C) 2006 Andrew Victor + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#ifndef __ASM_ARCH_GPIO_H_ +#define __ASM_ARCH_GPIO_H_ + +/* + * Configure the GPIO line as an input. + */ +extern int ks8695_set_gpio_input(unsigned int pin); + +/* + * Configure the GPIO line as an output, with default state. + */ +extern int ks8695_set_gpio_output(unsigned int pin, unsigned int state); + +/* + * Set the state of an output GPIO line. + */ +extern int ks8695_set_gpio_value(unsigned int pin, unsigned int state); + +/* + * Read the state of a GPIO line. + */ +extern int ks8695_get_gpio_value(unsigned int pin); + +/* + * Configure GPIO pin as external interrupt source. + */ +extern int ks8695_gpio_interrupt(unsigned int pin); + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/hardware.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/hardware.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/hardware.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/hardware.h Thu Jun 15 17:19:28 2006 @@ -0,0 +1,50 @@ +/* + * include/asm-arm/arch-ks8695/hardware.h + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - Memory Map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include + +/* + * Physical RAM address. + */ +#define KS8695_SDRAM_PA 0x00000000 + + +/* + * We map an entire MiB with the System Configuration Registers in even + * though only 64KiB is needed. This makes it easier for use with the + * head debug code as the initial MMU setup only deals in L1 sections. + */ +#define KS8695_IO_PA 0x03F00000 +#define KS8695_IO_VA 0xF0000000 +#define KS8695_IO_SIZE SZ_1M + +#define KS8695_PCIMEM_PA 0x60000000 +#define KS8695_PCIMEM_SIZE SZ_512M + +#define KS8695_PCIIO_PA 0x10000000 +#define KS8695_PCIIO_SIZE SZ_64K + + +/* + * PCI support + */ +#define pcibios_assign_all_busses() 1 + +#define PCIBIOS_MIN_IO 0 +#define PCIBIOS_MIN_MEM 0 + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/io.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/io.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/io.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/io.h Thu Jun 15 17:21:12 2006 @@ -0,0 +1,31 @@ +/* + * include/asm-arm/arch-ks8695/io.h + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 IO information + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_IO_H +#define __ASM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +#if 0 +// Ben Dook's version. +#define __io(a) (KS8695_ISA_VA + (a)) +#define __mem_isa(a) (KS8695_PCIMEM_VA + (a)) +#endif + +#define __io(a) ((void __iomem *)(a)) + +#define __mem_pci(a) (a) +#define __mem_isa(a) (a) + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/irqs.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/irqs.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/irqs.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/irqs.h Tue May 16 16:45:44 2006 @@ -0,0 +1,53 @@ +/* + * linux/include/asm-arm/arch-ks8695/irqs.h + * + * Copyright (c) 2003-2005 Simtec Electronics + * Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + +/* + * IRQ definitions + */ +#define KS8695_IRQ_COMM_RX 0 +#define KS8695_IRQ_COMM_TX 1 +#define KS8695_IRQ_EXTERN0 2 +#define KS8695_IRQ_EXTERN1 3 +#define KS8695_IRQ_EXTERN2 4 +#define KS8695_IRQ_EXTERN3 5 +#define KS8695_IRQ_TIMER0 6 +#define KS8695_IRQ_TIMER1 7 +#define KS8695_IRQ_UART_TX 8 +#define KS8695_IRQ_UART_RX 9 +#define KS8695_IRQ_UART_LINE_STATUS 10 +#define KS8695_IRQ_UART_MODEM_STATUS 11 +#define KS8695_IRQ_LAN_RX_STOP 12 +#define KS8695_IRQ_LAN_TX_STOP 13 +#define KS8695_IRQ_LAN_RX_BUF 14 +#define KS8695_IRQ_LAN_TX_BUF 15 +#define KS8695_IRQ_LAN_RX_STATUS 16 +#define KS8695_IRQ_LAN_TX_STATUS 17 +#define KS8695_IRQ_HPNA_RX_STOP 18 +#define KS8695_IRQ_HPNA_TX_STOP 19 +#define KS8695_IRQ_HPNA_RX_BUF 20 +#define KS8695_IRQ_HPNA_TX_BUF 21 +#define KS8695_IRQ_HPNA_RX_STATUS 22 +#define KS8695_IRQ_HPNA_TX_STATUS 23 +#define KS8695_IRQ_BUS_ERROR 24 +#define KS8695_IRQ_WAN_RX_STOP 25 +#define KS8695_IRQ_WAN_TX_STOP 26 +#define KS8695_IRQ_WAN_RX_BUF 27 +#define KS8695_IRQ_WAN_TX_BUF 28 +#define KS8695_IRQ_WAN_RX_STATUS 29 +#define KS8695_IRQ_WAN_TX_STATUS 30 +#define KS8695_IRQ_WAN_LINK 31 + +#define NR_IRQS 32 + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/memory.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/memory.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/memory.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/memory.h Mon Jun 19 11:43:56 2006 @@ -0,0 +1,31 @@ +/* + * include/asm-arm/arch-ks8695/memory.h + * + * (C) 2006 Andrew Victor + * + * KS8695 Memory definitions + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#include + +/* + * Physical SRAM offset. + */ +#define PHYS_OFFSET KS8695_SDRAM_PA + + +/* + * PCI mappings. + */ +#define __virt_to_bus(x) ((x) - PAGE_OFFSET + KS8695_PCIMEM_PA) +#define __bus_to_virt(x) ((x) - KS8695_PCIMEM_PA + PAGE_OFFSET) + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-gpio.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-gpio.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-gpio.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-gpio.h Tue Jun 13 16:48:38 2006 @@ -0,0 +1,52 @@ +/* + * include/asm-arm/arch-ks8695/regs-gpio.h + * + * (c) 2007 Andrew Victor + * + * KS8695 - GPIO control registers and bit definitions. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_GPIO_H +#define KS8695_GPIO_H + +#define KS8695_GPIO_OFFSET (0xF0000 + 0xE600) +#define KS8695_GPIO_VA (KS8695_IO_VA + KS8695_GPIO_OFFSET) +#define KS8695_GPIO_PA (KS8695_IO_PA + KS8695_GPIO_OFFSET) + + +#define KS8695_IOPM (0x00) /* I/O Port Mode Register */ +#define KS8695_IOPC (0x04) /* I/O Port Control Register */ +#define KS8695_IOPD (0x06) /* I/O Port Data Register */ + + +/* Port Mode Register */ +#define IOPM_(x) (1 << (x)) /* Mode for GPIO Pin x */ + +/* Port Control Register */ +#define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */ +#define IOPC_IOTIM0EN (1 << 16) /* GPIO Pin for Timer0 Enable */ +#define IOPC_IOEINT3EN (1 << 15) /* GPIO Pin for External/Soft Interrupt 3 Enable */ +#define IOPC_IOEINT3TM (7 << 12) /* GPIO Pin for External/Soft Interrupt 3 Trigger Mode */ +#define IOPC_IOEINT3_MODE(x) ((x) << 12) +#define IOPC_IOEINT2EN (1 << 11) /* GPIO Pin for External/Soft Interrupt 2 Enable */ +#define IOPC_IOEINT2TM (7 << 8) /* GPIO Pin for External/Soft Interrupt 2 Trigger Mode */ +#define IOPC_IOEINT2_MODE(x) ((x) << 8) +#define IOPC_IOEINT1EN (1 << 7) /* GPIO Pin for External/Soft Interrupt 1 Enable */ +#define IOPC_IOEINT1TM (7 << 4) /* GPIO Pin for External/Soft Interrupt 1 Trigger Mode */ +#define IOPC_IOEINT1_MODE(x) ((x) << 4) +#define IOPC_IOEINT0EN (1 << 3) /* GPIO Pin for External/Soft Interrupt 0 Enable */ +#define IOPC_IOEINT0TM (7 << 0) /* GPIO Pin for External/Soft Interrupt 0 Trigger Mode */ +#define IOPC_IOEINT0_MODE(x) ((x) << 0) + + /* Trigger Modes */ +#define IOPC_TM_LOW (0) /* Level Detection (Active Low) */ +#define IOPC_TM_HIGH (1) /* Level Detection (Active High) */ +#define IOPC_TM_RISING (2) /* Rising Edge Detection */ +#define IOPC_TM_FALLING (4) /* Falling Edge Detection */ +#define IOPC_TM_EDGE (6) /* Both Edge Detection */ + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-hpna.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-hpna.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-hpna.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-hpna.h Fri Jun 2 20:11:01 2006 @@ -0,0 +1,26 @@ +/* + * include/asm-arm/arch-ks8695/regs-wan.h + * + * (C) 2006 Andrew Victor + * + * KS8695 - HPNA Registers and bit definitions. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_HPNA_H +#define KS8695_HPNA_H + +#define KS8695_HPNA_OFFSET (0xF0000 + 0xA000) +#define KS8695_HPNA_VA (KS8695_IO_VA + KS8695_HPNA_OFFSET) +#define KS8695_HPNA_PA (KS8695_IO_PA + KS8695_HPNA_OFFSET) + + +/* + * HPNA registers + */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-irq.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-irq.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-irq.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-irq.h Thu Jun 8 12:11:03 2006 @@ -0,0 +1,42 @@ +/* + * include/asm-arm/arch-ks8695/regs-irq.h + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - IRQ registers and bit definitions + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_IRQ_H +#define KS8695_IRQ_H + +#define KS8695_IRQ_OFFSET (0xF0000 + 0xE200) +#define KS8695_IRQ_VA (KS8695_IO_VA + KS8695_IRQ_OFFSET) +#define KS8695_IRQ_PA (KS8695_IO_PA + KS8695_IRQ_OFFSET) + + +/* + * Interrupt Controller registers + */ +#define KS8695_INTMC (0x00) /* Mode Control Register */ +#define KS8695_INTEN (0x04) /* Interrupt Enable Register */ +#define KS8695_INTST (0x08) /* Interrupt Status Register */ +#define KS8695_INTPW (0x0c) /* Interrupt Priority (WAN MAC) */ +#define KS8695_INTPH (0x10) /* Interrupt Priority (HPNA) [KS8695 only] */ +#define KS8695_INTPL (0x14) /* Interrupt Priority (LAN MAC) */ +#define KS8695_INTPT (0x18) /* Interrupt Priority (Timer) */ +#define KS8695_INTPU (0x1c) /* Interrupt Priority (UART) */ +#define KS8695_INTPE (0x20) /* Interrupt Priority (External Interrupt) */ +#define KS8695_INTPC (0x24) /* Interrupt Priority (Communications Channel) */ +#define KS8695_INTPBE (0x28) /* Interrupt Priority (Bus Error Response) */ +#define KS8695_INTMS (0x2c) /* Interrupt Mask Status Register */ +#define KS8695_INTHPF (0x30) /* Interrupt Pending Highest Priority (FIQ) */ +#define KS8695_INTHPI (0x34) /* Interrupt Pending Highest Priority (IRQ) */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-lan.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-lan.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-lan.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-lan.h Mon May 22 16:25:42 2006 @@ -0,0 +1,65 @@ +/* + * include/asm-arm/arch-ks8695/regs-lan.h + * + * (C) 2006 Andrew Victor + * + * KS8695 - LAN Registers and bit definitions. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_LAN_H +#define KS8695_LAN_H + +#define KS8695_LAN_OFFSET (0xF0000 + 0x8000) +#define KS8695_LAN_VA (KS8695_IO_VA + KS8695_LAN_OFFSET) +#define KS8695_LAN_PA (KS8695_IO_PA + KS8695_LAN_OFFSET) + + +/* + * LAN registers + */ +#define KS8695_LMDTXC (0x00) /* DMA Transmit Control */ +#define KS8695_LMDRXC (0x04) /* DMA Receive Control */ +#define KS8695_LMDTSC (0x08) /* DMA Transmit Start Command */ +#define KS8695_LMDRSC (0x0c) /* DMA Receive Start Command */ +#define KS8695_LTDLB (0x10) /* Transmit Descriptor List Base Address */ +#define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */ +#define KS8695_LMAL (0x18) /* MAC Station Address Low */ +#define KS8695_LMAH (0x1c) /* MAC Station Address High */ +#define KS8695_LMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ +#define KS8695_LMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ + + +/* DMA Transmit Control Register */ +#define LMDTXC_LMTRST (1 << 31) /* Soft Reset */ +#define LMDTXC_LMTBS (0x3f << 24) /* Transmit Burst Size */ +#define LMDTXC_LMTUCG (1 << 18) /* Transmit UDP Checksum Generate */ +#define LMDTXC_LMTTCG (1 << 17) /* Transmit TCP Checksum Generate */ +#define LMDTXC_LMTICG (1 << 16) /* Transmit IP Checksum Generate */ +#define LMDTXC_LMTFCE (1 << 9) /* Transmit Flow Control Enable */ +#define LMDTXC_LMTLB (1 << 8) /* Loopback mode */ +#define LMDTXC_LMTEP (1 << 2) /* Transmit Enable Padding */ +#define LMDTXC_LMTAC (1 << 1) /* Transmit Add CRC */ +#define LMDTXC_LMTE (1 << 0) /* TX Enable */ + +/* DMA Receive Control Register */ +#define LMDRXC_LMRBS (0x3f << 24) /* Receive Burst Size */ +#define LMDRXC_LMRUCC (1 << 18) /* Receive UDP Checksum check */ +#define LMDRXC_LMRTCG (1 << 17) /* Receive TCP Checksum check */ +#define LMDRXC_LMRICG (1 << 16) /* Receive IP Checksum check */ +#define LMDRXC_LMRFCE (1 << 9) /* Receive Flow Control Enable */ +#define LMDRXC_LMRB (1 << 6) /* Receive Broadcast */ +#define LMDRXC_LMRM (1 << 5) /* Receive Multicast */ +#define LMDRXC_LMRU (1 << 4) /* Receive Unicast */ +#define LMDRXC_LMRERR (1 << 3) /* Receive Error Frame */ +#define LMDRXC_LMRA (1 << 2) /* Receive All */ +#define LMDRXC_LMRE (1 << 1) /* RX Enable */ + +/* Additional Station Address High */ +#define LMAAH_E (1 << 31) /* Address Enabled */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-mem.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-mem.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-mem.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-mem.h Thu May 25 14:58:27 2006 @@ -0,0 +1,89 @@ +/* + * include/asm-arm/arch-ks8695/regs-mem.h + * + * (C) 2006 Andrew Victor + * + * KS8695 - Memory Controller registers and bit definitions + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_MEM_H +#define KS8695_MEM_H + +#define KS8695_MEM_OFFSET (0xF0000 + 0x4000) +#define KS8695_MEM_VA (KS8695_IO_VA + KS8695_MEM_OFFSET) +#define KS8695_MEM_PA (KS8695_IO_PA + KS8695_MEM_OFFSET) + + +/* + * Memory Controller Registers + */ +#define KS8695_EXTACON0 (0x00) /* External I/O 0 Access Control */ +#define KS8695_EXTACON1 (0x04) /* External I/O 1 Access Control */ +#define KS8695_EXTACON2 (0x08) /* External I/O 2 Access Control */ +#define KS8695_ROMCON0 (0x10) /* ROM/SRAM/Flash 1 Control Register */ +#define KS8695_ROMCON1 (0x14) /* ROM/SRAM/Flash 2 Control Register */ +#define KS8695_ERGCON (0x20) /* External I/O and ROM/SRAM/Flash General Register */ +#define KS8695_SDCON0 (0x30) /* SDRAM Control Register 0 */ +#define KS8695_SDCON1 (0x34) /* SDRAM Control Register 1 */ +#define KS8695_SDGCON (0x38) /* SDRAM General Control */ +#define KS8695_SDBCON (0x3c) /* SDRAM Buffer Control */ +#define KS8695_REFTIM (0x40) /* SDRAM Refresh Timer */ + + +/* External I/O Access Control Registers */ +#define EXTACON_EBNPTR (0x3ff << 22) /* Last Address Pointer */ +#define EXTACON_EBBPTR (0x3ff << 12) /* Base Pointer */ +#define EXTACON_EBTACT (7 << 9) /* Write Enable/Output Enable Active Time */ +#define EXTACON_EBTCOH (7 << 6) /* Chip Select Hold Time */ +#define EXTACON_EBTACS (7 << 3) /* Address Setup Time before ECSN */ +#define EXTACON_EBTCOS (7 << 0) /* Chip Select Time before OEN */ + +/* ROM/SRAM/Flash Control Register */ +#define ROMCON_RBNPTR (0x3ff << 22) /* Next Pointer */ +#define ROMCON_RBBPTR (0x3ff << 12) /* Base Pointer */ +#define ROMCON_RBTACC (7 << 4) /* Access Cycle Time */ +#define ROMCON_RBTPA (3 << 2) /* Page Address Access Time */ +#define ROMCON_PMC (3 << 0) /* Page Mode Configuration */ +#define PMC_NORMAL (0 << 0) +#define PMC_4WORD (1 << 0) +#define PMC_8WORD (2 << 0) +#define PMC_16WORD (3 << 0) + +/* External I/O and ROM/SRAM/Flash General Register */ +#define ERGCON_TMULT (3 << 28) /* Time Multiplier */ +#define ERGCON_DSX2 (3 << 20) /* Data Width (External I/O Bank 2) */ +#define ERGCON_DSX1 (3 << 18) /* Data Width (External I/O Bank 1) */ +#define ERGCON_DSX0 (3 << 16) /* Data Width (External I/O Bank 0) */ +#define ERGCON_DSR1 (3 << 2) /* Data Width (ROM/SRAM/Flash Bank 1) */ +#define ERGCON_DSR0 (3 << 0) /* Data Width (ROM/SRAM/Flash Bank 0) */ + +/* SDRAM Control Register */ +#define SDCON_DBNPTR (0x3ff << 22) /* Last Address Pointer */ +#define SDCON_DBBPTR (0x3ff << 12) /* Base Pointer */ +#define SDCON_DBCAB (3 << 8) /* Column Address Bits */ +#define SDCON_DBBNUM (1 << 3) /* Number of Banks */ +#define SDCON_DBDBW (3 << 1) /* Data Bus Width */ + +/* SDRAM General Control Register */ +#define SDGCON_SDTRC (3 << 2) /* RAS to CAS latency */ +#define SDGCON_SDCAS (3 << 0) /* CAS latency */ + +/* SDRAM Buffer Control Register */ +#define SDBCON_SDESTA (1 << 31) /* SDRAM Engine Status */ +#define SDBCON_RBUFBDIS (1 << 24) /* Read Buffer Burst Enable */ +#define SDBCON_WFIFOEN (1 << 23) /* Write FIFO Enable */ +#define SDBCON_RBUFEN (1 << 22) /* Read Buffer Enable */ +#define SDBCON_FLUSHWFIFO (1 << 21) /* Flush Write FIFO */ +#define SDBCON_RBUFINV (1 << 20) /* Read Buffer Invalidate */ +#define SDBCON_SDINI (3 << 16) /* SDRAM Initialization Control */ +#define SDBCON_SDMODE (0x3fff << 0) /* SDRAM Mode Register Value Program */ + +/* SDRAM Refresh Timer Register */ +#define REFTIM_REFTIM (0xffff << 0) /* Refresh Timer Value */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-misc.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-misc.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-misc.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-misc.h Thu Jun 8 12:11:12 2006 @@ -0,0 +1,97 @@ +/* + * include/asm-arm/arch-ks8695/regs-misc.h + * + * (C) 2006 Andrew Victor + * + * KS8695 - Miscellaneous Registers + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_MISC_H +#define KS8695_MISC_H + +#define KS8695_MISC_OFFSET (0xF0000 + 0xEA00) +#define KS8695_MISC_VA (KS8695_IO_VA + KS8695_MISC_OFFSET) +#define KS8695_MISC_PA (KS8695_IO_PA + KS8695_MISC_OFFSET) + + +/* + * Miscellaneous registers + */ +#define KS8695_DID (0x00) /* Device ID */ +#define KS8695_RID (0x04) /* Revision ID */ +#define KS8695_HMC (0x08) /* HPNA Miscnellaneous Control [KS8695 only] */ +#define KS8695_WMC (0x0c) /* WAN Miscellaneous Control */ +#define KS8695_WPPM (0x10) /* WAN PHY Power Management */ +#define KS8695_PPS (0x1c) /* PHY PowerSave */ + +/* Device ID Register */ +#define DID_ID (0xffff << 0) /* Device ID */ + +/* Revision ID Register */ +#define RID_SUBID (0xf << 4) /* Sub-Device ID */ +#define RID_REVISION (0xf << 0) /* Revision ID */ + +/* HPNA Miscellaneous Control Register */ +#define HMC_HSS (1 << 1) /* Speed */ +#define HMC_HDS (1 << 0) /* Duplex */ + +/* WAN Miscellaneous Control Register */ +#define WMC_WANC (1 << 30) /* Auto-negotiation complete */ +#define WMC_WANR (1 << 29) /* Auto-negotiation restart */ +#define WMC_WANAP (1 << 28) /* Advertise Pause */ +#define WMC_WANA100F (1 << 27) /* Advertise 100 FDX */ +#define WMC_WANA100H (1 << 26) /* Advertise 100 HDX */ +#define WMC_WANA10F (1 << 25) /* Advertise 10 FDX */ +#define WMC_WANA10H (1 << 24) /* Advertise 10 HDX */ +#define WMC_WLS (1 << 23) /* Link status */ +#define WMC_WDS (1 << 22) /* Duplex status */ +#define WMC_WSS (1 << 21) /* Speed status */ +#define WMC_WLPP (1 << 20) /* Link Partner Pause */ +#define WMC_WLP100F (1 << 19) /* Link Partner 100 FDX */ +#define WMC_WLP100H (1 << 18) /* Link Partner 100 HDX */ +#define WMC_WLP10F (1 << 17) /* Link Partner 10 FDX */ +#define WMC_WLP10H (1 << 16) /* Link Partner 10 HDX */ +#define WMC_WAND (1 << 15) /* Auto-negotiation disable */ +#define WMC_WANF100 (1 << 14) /* Force 100 */ +#define WMC_WANFF (1 << 13) /* Force FDX */ +#define WMC_WLED1S (7 << 4) /* LED1 Select */ +#define WLED1S_SPEED (0 << 4) +#define WLED1S_LINK (1 << 4) +#define WLED1S_DUPLEX (2 << 4) +#define WLED1S_COLLISION (3 << 4) +#define WLED1S_ACTIVITY (4 << 4) +#define WLED1S_FDX_COLLISION (5 << 4) +#define WLED1S_LINK_ACTIVITY (6 << 4) +#define WMC_WLED0S (7 << 0) /* LED0 Select */ +#define WLED0S_SPEED (0 << 0) +#define WLED0S_LINK (1 << 0) +#define WLED0S_DUPLEX (2 << 0) +#define WLED0S_COLLISION (3 << 0) +#define WLED0S_ACTIVITY (4 << 0) +#define WLED0S_FDX_COLLISION (5 << 0) +#define WLED0S_LINK_ACTIVITY (6 << 0) + +/* WAN PHY Power Management Register */ +#define WPPM_WLPBK (1 << 14) /* Local Loopback */ +#define WPPM_WRLPKB (1 << 13) /* Remove Loopback */ +#define WPPM_WPI (1 << 12) /* PHY isolate */ +#define WPPM_WFL (1 << 10) /* Force link */ +#define WPPM_MDIXS (1 << 9) /* MDIX Status */ +#define WPPM_FEF (1 << 8) /* Far End Fault */ +#define WPPM_AMDIXP (1 << 7) /* Auto MDIX Parameter */ +#define WPPM_TXDIS (1 << 6) /* Disable transmitter */ +#define WPPM_DFEF (1 << 5) /* Disable Far End Fault */ +#define WPPM_PD (1 << 4) /* Power Down */ +#define WPPM_DMDX (1 << 3) /* Disable Auto MDI/MDIX */ +#define WPPM_FMDX (1 << 2) /* Force MDIX */ +#define WPPM_LPBK (1 << 1) /* MAX Loopback */ + +/* PHY Power Save Register */ +#define PPS_PPSM (1 << 0) /* PHY Power Save Mode */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-pci.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-pci.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-pci.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-pci.h Tue May 16 16:45:44 2006 @@ -0,0 +1,58 @@ +/* + * include/asm-arm/arch-ks8695/regs-pci.h + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - PCI bridge registers and bit definitions. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#define KS8695_PCI_OFFSET (0xF0000 + 0x2000) +#define KS8695_PCI_VA (KS8695_IO_VA + KS8695_PCI_OFFSET) +#define KS8695_PCI_PA (KS8695_IO_PA + KS8695_PCI_OFFSET) + + +#define KS8695_CRCFID (0x000) /* Configuration: Identification */ +#define KS8695_CRCFCS (0x004) /* Configuration: Command and Status */ +#define KS8695_CRCFRV (0x008) /* Configuration: Revision */ +#define KS8695_CRCFLT (0x00C) /* Configuration: Latency Timer */ +#define KS8695_CRCBMA (0x010) /* Configuration: Base Memory Address */ +#define KS8695_CRCSID (0x02C) /* Configuration: Subsystem ID */ +#define KS8695_CRCFIT (0x03C) /* Configuration: Interrupt */ +#define KS8695_PBCA (0x100) /* Bridge Configuration Address */ +#define KS8695_PBCD (0x104) /* Bridge Configuration Data */ +#define KS8695_PBM (0x200) /* Bridge Mode */ +#define KS8695_PBCS (0x204) /* Bridge Control and Status */ +#define KS8695_PMBA (0x208) /* Bridge Memory Base Address */ +#define KS8695_PMBAC (0x20C) /* Bridge Memory Base Address Control */ +#define KS8695_PMBAM (0x210) /* Bridge Memory Base Address Mask */ +#define KS8695_PMBAT (0x214) /* Bridge Memory Base Address Translation */ +#define KS8695_PIOBA (0x218) /* Bridge I/O Base Address */ +#define KS8695_PIOBAC (0x21C) /* Bridge I/O Base Address Control */ +#define KS8695_PIOBAM (0x220) /* Bridge I/O Base Address Mask */ +#define KS8695_PIOBAT (0x224) /* Bridge I/O Base Address Translation */ + + +/* Configuration: Identification */ + +/* Configuration: Command and Status */ + +/* Configuration: Revision */ + + + +#define CFRV_GUEST (1 << 23) + +#define PBCA_TYPE1 (1) +#define PBCA_ENABLE (1 << 31) + +#define PBM_GUEST (1 << 31) + +#define PBM_PCI (0 << 29) +#define PBM_MINIPCI (1 << 29) +#define PBM_CARDBUS (2 << 29) diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-switch.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-switch.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-switch.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-switch.h Wed May 24 16:19:04 2006 @@ -0,0 +1,65 @@ +/* + * include/asm-arm/arch-ks8695/regs-switch.h + * + * (C) 2006 Andrew Victor + * + * KS8695 - Switch Registers and bit definitions. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_SWITCH_H +#define KS8695_SWITCH_H + +#define KS8695_SWITCH_OFFSET (0xF0000 + 0xe800) +#define KS8695_SWITCH_VA (KS8695_IO_VA + KS8695_SWITCH_OFFSET) +#define KS8695_SWITCH_PA (KS8695_IO_PA + KS8695_SWITCH_OFFSET) + + +/* + * Switch registers + */ +#define KS8695_SEC0 (0x00) /* Switch Engine Control 0 */ +#define KS8695_SEC1 (0x04) /* Switch Engine Control 1 */ +#define KS8695_SEC2 (0x08) /* Switch Engine Control 2 */ + +#define KS8695_P(x)_C(z) (0xc0 + (((x)-1)*3 + ((z)-1))*4) /* Port Configuration Registers */ + +#define KS8695_SEP12AN (0x48) /* Port 1 & 2 Auto-Negotiation */ +#define KS8695_SEP34AN (0x4c) /* Port 3 & 4 Auto-Negotiation */ +#define KS8695_SEIAC (0x50) /* Indirect Access Control */ +#define KS8695_SEIADH2 (0x54) /* Indirect Access Data High 2 */ +#define KS8695_SEIADH1 (0x58) /* Indirect Access Data High 1 */ +#define KS8695_SEIADL (0x5c) /* Indirect Access Data Low */ +#define KS8695_SEAFC (0x60) /* Advance Feature Control */ +#define KS8695_SEDSCPH (0x64) /* TOS Priority High */ +#define KS8695_SEDSCPL (0x68) /* TOS Priority Low */ +#define KS8695_SEMAH (0x6c) /* Switch Engine MAC Address High */ +#define KS8695_SEMAL (0x70) /* Switch Engine MAC Address Low */ +#define KS8695_LPPM12 (0x74) /* Port 1 & 2 PHY Power Management */ +#define KS8695_LPPM34 (0x78) /* Port 3 & 4 PHY Power Management */ + + +/* Swtich Engine Control 0 */ +#define SEC0_LLED1S (7 << 25) /* LED1 Select */ +#define LLED1S_SPEED (0 << 25) +#define LLED1S_LINK (1 << 25) +#define LLED1S_DUPLEX (2 << 25) +#define LLED1S_COLLISION (3 << 25) +#define LLED1S_ACTIVITY (4 << 25) +#define LLED1S_FDX_COLLISION (5 << 25) +#define LLED1S_LINK_ACTIVITY (6 << 25) +#define SEC0_LLED0S (7 << 22) /* LED0 Select */ +#define LLED0S_SPEED (0 << 22) +#define LLED0S_LINK (1 << 22) +#define LLED0S_DUPLEX (2 << 22) +#define LLED0S_COLLISION (3 << 22) +#define LLED0S_ACTIVITY (4 << 22) +#define LLED0S_FDX_COLLISION (5 << 22) +#define LLED0S_LINK_ACTIVITY (6 << 22) +#define SEC0_ENABLE (1 << 0) /* Enable Switch */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-sys.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-sys.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-sys.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-sys.h Tue May 16 16:45:44 2006 @@ -0,0 +1,35 @@ +/* + * include/asm-arm/arch-ks8695/regs-sys.h + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - System control registers and bit definitions + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_SYS_H +#define KS8695_SYS_H + +#define KS8695_SYS_OFFSET (0xF0000 + 0x0000) +#define KS8695_SYS_VA (KS8695_IO_VA + KS8695_SYS_OFFSET) +#define KS8695_SYS_PA (KS8695_IO_PA + KS8695_SYS_OFFSET) + + +#define KS8695_SYSCFG (0x00) /* System Configuration Register */ +#define KS8695_CLKCON (0x04) /* System Clock and Bus Control Register */ + + +/* System Configuration Register */ +#define SYSCFG_SPRBP (0x3ff << 16) /* Register Bank Base Pointer */ + +/* System Clock and Bus Control Register */ +#define CLKCON_SFMODE (1 << 8) /* System Fast Mode for Simulation */ +#define CLKCON_SCDC (7 << 0) /* System Clock Divider Select */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-timer.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-timer.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-timer.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-timer.h Tue May 16 16:45:44 2006 @@ -0,0 +1,41 @@ +/* + * include/asm-arm/arch-ks8695/regs-timer.h + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - Timer registers and bit definitions. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_TIMER_H +#define KS8695_TIMER_H + +#define KS8695_TMR_OFFSET (0xF0000 + 0xE400) +#define KS8695_TMR_VA (KS8695_IO_VA + KS8695_TMR_OFFSET) +#define KS8695_TMR_PA (KS8695_IO_PA + KS8695_TMR_OFFSET) + + +/* + * Timer registers + */ +#define KS8695_TMCON (0x00) /* Timer Control Register */ +#define KS8695_T1TC (0x04) /* Timer 1 Timeout Count Register */ +#define KS8695_T0TC (0x08) /* Timer 0 Timeout Count Register */ +#define KS8695_T1PD (0x0C) /* Timer 1 Pulse Coutner Register */ +#define KS8695_T0PD (0x10) /* Timer 0 Pulse Count Register */ + + +/* Timer Control Register */ +#define TMCON_T1EN (1 << 1) /* Timer 1 Enable */ +#define TMCON_T0EN (1 << 0) /* Timer 0 Enable */ + +/* Timer0 Timeout Counter Register */ +#define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-uart.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-uart.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-uart.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-uart.h Tue May 16 16:45:44 2006 @@ -0,0 +1,93 @@ +/* + * linux/include/asm-arm/arch-ks8695/regs-uart.h + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - UART register and bit definitions. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef KS8695_UART_H +#define KS8695_UART_H + +#define KS8695_UART_OFFSET (0xF0000 + 0xE000) +#define KS8695_UART_VA (KS8695_IO_VA + KS8695_UART_OFFSET) +#define KS8695_UART_PA (KS8695_IO_PA + KS8695_UART_OFFSET) + + +/* + * UART registers + */ +#define KS8695_URRB (0x00) /* Receive Buffer Register */ +#define KS8695_URTH (0x04) /* Transmit Holding Register */ +#define KS8695_URFC (0x08) /* FIFO Control Register */ +#define KS8695_URLC (0x0C) /* Line Control Register */ +#define KS8695_URMC (0x10) /* Modem Control Register */ +#define KS8695_URLS (0x14) /* Line Status Register */ +#define KS8695_URMS (0x18) /* Modem Status Register */ +#define KS8695_URBD (0x1C) /* Baud Rate Divisor Register */ +#define KS8695_USR (0x20) /* Status Register */ + + +/* FIFO Control Register */ +#define URFC_URFRT (3 << 6) /* Receive FIFO Trigger Level */ +#define URFC_URFRT_1 (0 << 6) +#define URFC_URFRT_4 (1 << 6) +#define URFC_URFRT_8 (2 << 6) +#define URFC_URFRT_14 (3 << 6) +#define URFC_URTFR (1 << 2) /* Transmit FIFO Reset */ +#define URFC_URRFR (1 << 1) /* Receive FIFO Reset */ +#define URFC_URFE (1 << 0) /* FIFO Enable */ + +/* Line Control Register */ +#define URLC_URSBC (1 << 6) /* Set Break Condition */ +#define URLC_PARITY (7 << 3) /* Parity */ +#define URPE_NONE (0 << 3) +#define URPE_ODD (1 << 3) +#define URPE_EVEN (3 << 3) +#define URPE_MARK (5 << 3) +#define URPE_SPACE (7 << 3) +#define URLC_URSB (1 << 2) /* Stop Bits */ +#define URLC_URCL (3 << 0) /* Character Length */ +#define URCL_5 (0 << 0) +#define URCL_6 (1 << 0) +#define URCL_7 (2 << 0) +#define URCL_8 (3 << 0) + +/* Modem Control Register */ +#define URMC_URLB (1 << 4) /* Loop-back mode */ +#define URMC_UROUT2 (1 << 3) /* OUT2 signal */ +#define URMC_UROUT1 (1 << 2) /* OUT1 signal */ +#define URMC_URRTS (1 << 1) /* Request to Send */ +#define URMC_URDTR (1 << 0) /* Data Terminal Ready */ + +/* Line Status Register */ +#define URLS_URRFE (1 << 7) /* Receive FIFO Error */ +#define URLS_URTE (1 << 6) /* Transmit Empty */ +#define URLS_URTHRE (1 << 5) /* Transmit Holding Register Empty */ +#define URLS_URBI (1 << 4) /* Break Interrupt */ +#define URLS_URFE (1 << 3) /* Framing Error */ +#define URLS_URPE (1 << 2) /* Parity Error */ +#define URLS_URROE (1 << 1) /* Receive Overrun Error */ +#define URLS_URDR (1 << 0) /* Receive Data Ready */ + +/* Modem Status Register */ +#define URMS_URDCD (1 << 7) /* Data Carrier Detect */ +#define URMS_URRI (1 << 6) /* Ring Indicator */ +#define URMS_URDSR (1 << 5) /* Data Set Ready */ +#define URMS_URCTS (1 << 4) /* Clear to Send */ +#define URMS_URDDCD (1 << 3) /* Delta Data Carrier Detect */ +#define URMS_URTERI (1 << 2) /* Trailing Edge Ring Indicator */ +#define URMS_URDDST (1 << 1) /* Delta Data Set Ready */ +#define URMS_URDCTS (1 << 0) /* Delta Clear to Send */ + +/* Status Register */ +#define USR_UTI (1 << 0) /* Timeout Indication */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-wan.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-wan.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/regs-wan.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/regs-wan.h Fri May 19 12:37:54 2006 @@ -0,0 +1,65 @@ +/* + * include/asm-arm/arch-ks8695/regs-wan.h + * + * (C) 2006 Andrew Victor + * + * KS8695 - WAN Registers and bit definitions. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_WAN_H +#define KS8695_WAN_H + +#define KS8695_WAN_OFFSET (0xF0000 + 0x6000) +#define KS8695_WAN_VA (KS8695_IO_VA + KS8695_WAN_OFFSET) +#define KS8695_WAN_PA (KS8695_IO_PA + KS8695_WAN_OFFSET) + + +/* + * WAN registers + */ +#define KS8695_WMDTXC (0x00) /* DMA Transmit Control */ +#define KS8695_WMDRXC (0x04) /* DMA Receive Control */ +#define KS8695_WMDTSC (0x08) /* DMA Transmit Start Command */ +#define KS8695_WMDRSC (0x0c) /* DMA Receive Start Command */ +#define KS8695_WTDLB (0x10) /* Transmit Descriptor List Base Address */ +#define KS8695_WRDLB (0x14) /* Receive Descriptor List Base Address */ +#define KS8695_WMAL (0x18) /* MAC Station Address Low */ +#define KS8695_WMAH (0x1c) /* MAC Station Address High */ +#define KS8695_WMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ +#define KS8695_WMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ + + +/* DMA Transmit Control Register */ +#define WMDTXC_WMTRST (1 << 31) /* Soft Reset */ +#define WMDTXC_WMTBS (0x3f << 24) /* Transmit Burst Size */ +#define WMDTXC_WMTUCG (1 << 18) /* Transmit UDP Checksum Generate */ +#define WMDTXC_WMTTCG (1 << 17) /* Transmit TCP Checksum Generate */ +#define WMDTXC_WMTICG (1 << 16) /* Transmit IP Checksum Generate */ +#define WMDTXC_WMTFCE (1 << 9) /* Transmit Flow Control Enable */ +#define WMDTXC_WMTLB (1 << 8) /* Loopback mode */ +#define WMDTXC_WMTEP (1 << 2) /* Transmit Enable Padding */ +#define WMDTXC_WMTAC (1 << 1) /* Transmit Add CRC */ +#define WMDTXC_WMTE (1 << 0) /* TX Enable */ + +/* DMA Receive Control Register */ +#define WMDRXC_WMRBS (0x3f << 24) /* Receive Burst Size */ +#define WMDRXC_WMRUCC (1 << 18) /* Receive UDP Checksum check */ +#define WMDRXC_WMRTCG (1 << 17) /* Receive TCP Checksum check */ +#define WMDRXC_WMRICG (1 << 16) /* Receive IP Checksum check */ +#define WMDRXC_WMRFCE (1 << 9) /* Receive Flow Control Enable */ +#define WMDRXC_WMRB (1 << 6) /* Receive Broadcast */ +#define WMDRXC_WMRM (1 << 5) /* Receive Multicast */ +#define WMDRXC_WMRU (1 << 4) /* Receive Unicast */ +#define WMDRXC_WMRERR (1 << 3) /* Receive Error Frame */ +#define WMDRXC_WMRA (1 << 2) /* Receive All */ +#define WMDRXC_WMRE (1 << 0) /* RX Enable */ + +/* Additional Station Address High */ +#define WMAAH_E (1 << 31) /* Address Enabled */ + + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/system.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/system.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/system.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/system.h Wed Jun 14 12:16:45 2006 @@ -0,0 +1,50 @@ +/* + * include/asm-arm/arch-s3c2410/system.h + * + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - System function defines and includes + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include + +static void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks, + */ + cpu_do_idle(); + +} + +static void arch_reset(char mode) +{ + unsigned int reg; + + if (mode == 's') + cpu_reset(0); + + /* disable timer0 */ + reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); + __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); + + /* enable watchdog mode */ + __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); + + /* re-enable timer0 */ + __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); + + while (1) {} +} + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/timex.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/timex.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/timex.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/timex.h Tue May 16 16:45:44 2006 @@ -0,0 +1,20 @@ +/* + * include/asm-arm/arch-ks8695/timex.h + * + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - Time Parameters + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H + +/* timers are derived from MCLK, which is 25MHz */ +#define CLOCK_TICK_RATE 25000000 + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/uncompress.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/uncompress.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/uncompress.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/uncompress.h Wed Jun 14 14:37:10 2006 @@ -0,0 +1,50 @@ +/* + * include/asm-arm/arch-ks8695/uncompress.h + * + * (c) 2006 Ben Dooks + * (c) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - Kernel uncompressor + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include +#include + + +static void putc(char c) +{ + while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE)) + barrier(); + + __raw_writel(c, KS8695_UART_PA + KS8695_URTH); +} + +static inline void flush(void) +{ + while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTE)) + barrier(); +} + +#if 0 +#define arch_decomp_setup() +#else +#include + +static void arch_decomp_setup(void) +{ + // This should have been done by the bootloader!! + __raw_writel(0x00, KS8695_IRQ_PA + KS8695_INTEN); // All interrupts off. +} +#endif + +#define arch_decomp_wdog() + +#endif diff -urN -x CVS linux-2.6.17-san/include/asm-arm/arch-ks8695/vmalloc.h linux-2.6.17-rc/include/asm-arm/arch-ks8695/vmalloc.h --- linux-2.6.17-san/include/asm-arm/arch-ks8695/vmalloc.h Thu Jan 1 02:00:00 1970 +++ linux-2.6.17-rc/include/asm-arm/arch-ks8695/vmalloc.h Wed Jun 14 14:34:26 2006 @@ -0,0 +1,19 @@ +/* + * include/asm-arm/arch-ks8695/vmalloc.h + * + * Copyright (c) 2006 Ben Dooks + * Copyright (c) 2006 Simtec Electronics + * + * KS8695 vmalloc definition + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H + +#define VMALLOC_END (KS8695_IO_VA & PGDIR_MASK) + +#endif diff -urN -x CVS linux-2.6.17-san/include/linux/serial_core.h linux-2.6.17-rc/include/linux/serial_core.h --- linux-2.6.17-san/include/linux/serial_core.h Wed Jun 21 14:02:43 2006 +++ linux-2.6.17-rc/include/linux/serial_core.h Tue May 16 16:45:45 2006 @@ -130,6 +130,9 @@ /* SUN4V Hypervisor Console */ #define PORT_SUNHV 72 +/* Micrel KS8695 */ +#define PORT_KS8695 73 + #ifdef __KERNEL__ #include